Making FPGA.vi More Dynamic

[atokad]

I'm wanting to make my FPGA.vi more dynamic. What I mean by that is that I am tired of having to compile every time I need to check if something is working properly. As you can see in the snippet below I am using clusters to communicate from the real time vi to the FPGA.vi. 

Currently the vi takes a cluster of six outputs and there respective gains for the AO module (NI 9264):

1. Tube_N2_MFC
2. Pressure
3. Tube_Air_MFC
4. McKenna_Fuel_MFC
5. McKenna_Air_MFC
6. Tube_Fuel_MFC
   

   -----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------

7. Internal Pressure
8. Mic_Voltage
9. Temperature_Large

and has nine inputs, six corresponding with respect to their AO/gains, two that are AI(NI 9205)/gains and one that is a TC (NI 9213) reading (conversion from TC to actual temp is done on the real-time vi).

FPGA.vi-Snippet

Say variables above 7-9 are constants. I will always only be reading from these 3 devices. However say I want to have the ability to change the pressure transducer or the microphone being used. Easy enough I add variable7_gain, variable8_gain ... values to the cluster and edit the gain values in the real-time script, boom done.

But let's say I want to be able to increase the number of AO devices from six to eight or ten or however many I desire (again with their respective gains) depending on what we are testing. Creating a bunch of different case structures would be pointless obviously because I wouldn't be able to prepare for all the different scenarios. Is there anything I can do to grow/shrink the "Switch Node" based on the number of inputs being fed through the input cluster? Or is there some obvious solution that I am missing to this problem?

I'm self-taught in LabVIEW so you will not offend me by critiquing my code. Any sort of help or tips thrown my way are always greatly appreciated!

[crossrulz]

What cRIO are you using?  What is your loop rate?  I see a 50 in there, but is that ticks, us, or ms?  If ms, I would consider just using the Scan Engine and move all of this code to your RT.  It would be a lot simpler to update your code that way.

[atokad]

---

@crossrulz wrote:

What cRIO are you using?  What is your loop rate?  I see a 50 in there, but is that ticks, us, or ms?  If ms, I would consider just using the Scan Engine and move all of this code to your RT.  It would be a lot simpler to update your code that way.

---

Hey crossrulz, thanks for responding so quickly! I am using a cRIO-9035 and my loop rate is set to 50 us. The thing is I need to have the Output_FPGA_Cluster in an FPGA.vi because I am pulling that cluster from the cRIO to Python using the niFPGA library which uses the FPGA bitfile to read the cluster.

[Intaris]

1. Your code is hugely inefficient.  Using SGL when it's not needed (you can divide and multiply FXP you know - also instead of dividine, multiply by 1/x, it's far more efficient).

2. make a sub-vi with an IO Node refnum input.  Pass in a calibration value.  Make it read from the IO-Node and apply the calibration (Multiply).  You can now place N instances of this sub-VI, wire up the IO node references, pass in the calibration and you have defined a hardware function.  Do this with the other types also.

[atokad]

---

@Intaris wrote:

1. Your code is hugely inefficient.  Using SGL when it's not needed (you can divide and multiply FXP you know - also instead of dividine, multiply by 1/x, it's far more efficient).

2. make a sub-vi with an IO Node refnum input.  Pass in a calibration value.  Make it read from the IO-Node and apply the calibration (Multiply).  You can now place N instances of this sub-VI, wire up the IO node references, pass in the calibration and you have defined a hardware function.  Do this with the other types also.

---

I am understanding your first point, but I am confused on what you mean by your second one. Can you or someone else show me a small example of what you're talking about?

[Intaris]

You can create an I/O Node which will allow you to choose a certain port of your device via a drop-down menu,

You can define a sub-VI with such a control (See HERE) and then wire it up with a constant on the BD of your top-level VI.  this way you can re-use a single VI for multiple different channels and adding / removing channels becomes easier.

You will need one such VI for each different TYPE (not each instance) of channel.