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Labview RT & FPGA : broken wires in fpga vi when load from project

hello

I've got an easy problem.

I've developed an fpga application in a project and an RT application in another  one.

The fpga vi and lvbit is now included into the RT project.
When I open the fpga program diagramme, every FPGA I/O node are broken!! the error message is " name not found"

Despite this, the program work perfectly when running!!!

Has anybody a solution ?

Thanks a lot.

James
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Message 1 of 7
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Hello James,

Which versions of LabVIEW and LabVIEW FPGA do you use? According to your preceding messages, it would be LabVIEW 7.1, but you speak about a RT project. What about the version of the FPGA module? Which FPGA material do you target (783xR for example)? From a RT desktop?
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Message 2 of 7
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Hi

I'm using LV 8.0.1 , LV FPGA 8.0.0, LV RT 8.0.1 with ni-pci-7833R and a desktop RT.

In fact when the fpga VI is included in the rt project, all I/O link seems to be lost for editing the vi but not for running it!!


james
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Message 3 of 7
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I think that the problem come from your project RT: if you did not specify a target FPGA in your RT project, LabVIEW will not be able to edit your VI as FPGA VI. but a "copy-paste" of the Open FPGA VI Reference from your host VI of your FPGA project, keep the link toward the bitfile and keep information of target, explaining why your project functions.
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Message 4 of 7
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but I've declare my fpga in the projetc as you can see in the file attached. Maybe there is something to do. In the original project there is not problem. It should also works here.




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Message 5 of 7
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I can't see the contents of "FPGA target" on your visuals, so perhaps it's already done, but check that the FPGA VI is under FPGA target, and that the inputs/ouptput you use are declared.

Hope this will fix your problem.
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Message 6 of 7
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I have import the I/O configuration in my project and it works.

It surprises me because I thought I've already done it once without adding I/O and there was no problem.

Thanks for help


James
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Message 7 of 7
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