LabVIEW

cancel
Showing results for 
Search instead for 
Did you mean: 

LabView FPGA compilation stuck

Solved!
Go to solution

 

Hi everyone,

I'm experiencing an issue with my signal processing code for the PXIe-5774 digitizer and FPGA. I've successfully compiled FPGA codes in LabVIEW 2021 before, but now I'm encountering a new problem: my compilation process is getting stuck at the "placing" stage.

Details:

  • FPGA Model: PXIe-5774
  • LabVIEW Version: 2021
  • Xilinx Vivado Version: 2019
  • Typical Compilation Time: ~4 hours

I’m working with different versions of my code that implement various FFT algorithms. Some of these compile without issues, but others (when FFT size is bigger and they consume more resources, but not 100% of anything) get stuck indefinitely at the following stage in the log:

Phase 4 Post Placement Optimization and Clean-Up Phase 4.1 Post Commit Optimization Phase 4.1.1 Post Placement Optimization Post Placement Optimization Initialization | Checksum: 194829907 Phase 4.1.1.1 BUFG Insertion INFO: [Place 46-35] Processed net MacallanWindow/theVI/ei0000003d, inserted BUFG to drive 75374 loads.

This process doesn't advance even after leaving it for 24 hours. I've tried:

  • Compiling multiple times
  • Using different build settings
  • Making slight alterations to the FPGA code to influence initial placement

Previously, I compiled previous code versions successfully with LabVIEW 2019 SP1 (Vivado 2017), but since upgrading to LabVIEW 2021 (Vivado 2019), I'm facing this issue with my new code.

Questions:

  1. Has anyone else experienced similar issues with the "placing" stage?
  2. What troubleshooting steps can I take to resolve this?

Thanks in advance for your help!

Best,
Aarni

0 Kudos
Message 1 of 7
(285 Views)

It could be many things.

 

Can you share your code here?  Which FFT algorithms are you using?  Your own, NI's, Xilinx?


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
0 Kudos
Message 2 of 7
(251 Views)

Hi!

I can't share the code but I am using the FFT express VI provided in the LVFPGA (or flexrio). It's not the algorithm. I tried to compile a code that I know compiled successfully previously and now it gets stuck on the same thing but it says it skipped the BUGF insertion. It has been stuck there for a couple hours:

 

Phase 4 Post Placement Optimization and Clean-Up

Phase 4.1 Post Commit Optimization

Phase 4.1.1 Post Placement Optimization
Post Placement Optimization Initialization | Checksum: 14b73ac50

Phase 4.1.1.1 BUFG Insertion
INFO: [Place 46-33] Processed net MacallanWindow/theVI/ei0000003d, BUFG insertion was skipped due to placement/routing conflicts.



Thanks:

Aarni

0 Kudos
Message 3 of 7
(246 Views)

What makes you certain it is not the algorithm?

 

Are you able to change/remove things and then it compiles?

 

Have you developed the algorithm without FlexRIO IO in its own project?  If so, do you have compile results from this?

 

How big is the FFT and how many do you have?  What clock rate are you doing the FFT at?

 

Are you reducing data in the FPGA?

 

###

 

You could use Vivado Export, compile in Vivado and see if the errors are something you can get help from either NI or Xilinx/AMD support.


Certified LabVIEW Architect, Certified Professional Instructor
ALE Consultants

Introduction to LabVIEW FPGA for RF, Radar, and Electronic Warfare Applications
0 Kudos
Message 4 of 7
(238 Views)

I would suggest following troubleshooting method.

1. Try to compile the old code (before upgrade) in your latest LabVIEW (2021) - Vivado version; 

2. Try to disable 'portions' of the new code (after upgrade) and compile.

3. Try to compile the code in different Server (NI Server or Local Server)

With this you can corner the issue. and can find the alternative solution or different toolkit version combination.

 

Happy Debugging...

Yogesh RPF

Regards,
Yogesh Redemptor
0 Kudos
Message 5 of 7
(203 Views)

The KU060 is a relatively large card. If you are running into placement issues or timing issues, the optimisation process can take a very long time.

 

I have had code on a Virtex 5 (much smaller target) vary in compile time from 1.5 hours to 17 hours depending on the amount of optimisation and juggling the compiler had to perform. I would recommend letting the compile run over the weekend and see if it finishes, errors out or is still "stuck" on Monday.

0 Kudos
Message 6 of 7
(189 Views)
Solution
Accepted by IhmeKyselijä

Hi!

 

Thank you for your responses. They were very helpful. I managed to get the compilations to finish successfully finally. My solution was to compile them in the LabVIEW 2019 version (so Vivado 2017). This is what I originally used but I upgraded to LabVIEW 2021 due to some other unrelated problems I faced previously. These problems are now solved but I kept on using the LabVIEW 2021 because the NI techincal support recommended it. 

 

So for anybody facing this same issue: Try to use a different version of Vivado/LabVIEW.

 

The Vivado 2019 did work for smaller compiles (as somebody suggested to try) but not for algorithms (the old or the new). I will mark this comment as the solution but all of your answers were helpful in debugging.

 

thank you:

Aarni

0 Kudos
Message 7 of 7
(164 Views)