The FPGA bitfile needs to be compiled for the hardware in question. So you have to recompile it in a LabVIEW project inside a target for your new hardware.
If your VI will recompile without issues will also depend what specific features you reference in it. Not every cRIO hardware provides exactly the same standard IO signals.
Also the RT executable will of course have to be recompiled too. Your cRIO-9082 runs Phar Lap ETS on an x86 CPU while your cRIO-9064 runs NI Linux on an ARM CPU. The resulting rtexe program from one platform is nothing more than a bunch of meaningless bytes for the other.