LabVIEW FPGA Single Cycle Timed Loop with FFT speed?

[Trekkie123]

I have a PXI system with an oscilloscope capable of 100 Megasamples/sec and an FPGA module with an 80 MHz clock. I would like to perform an fft on the fpga in a single-cycle timed loop where the fft size is 80. This means that one FFT is done every clock cycle right? Does this mean that if I have my oscilloscope set at 100Megasamples/sec I should be able to do 100,000,000 / 80 = 1,250,000 fft's per second? I'm not sure if I'm understanding correctly.

[VA.KI]

Hello,

Have you tried to use standard examples?

It is not clear how you are going to perform FFT but I think there is something is missing in your description.