Showing results for 
Search instead for 
Did you mean: 

Implementing frequency meter

Hello everyone,

this is my first VI on LabView and I hope that you can spend a bit of time on understanding my troubleshoot and eventually suggest me a solution.


I'm blocked on how can you implement a frequency meter. This instrument has to transform and input wave into a sequence of impulses (one for each time the input rises over 0), then count them and calculate the frequency of the input. 


This is what I need to implement:

Schermata 2022-04-21 alle 13.13.01.png

  • v(t) is transformed into a sequence of impulses U0
  • a start pulse is generated by me on time t0
  • ULC gets start pulse on t0 and makes U2 to become 0 instead of 1 until time t1. This tells to the counter to reset the displayed number.
  • in t1, U2 becomes again 1 so the signal U1 becomes High and lets U0 to pass through the AND door and reach the counter, which counts how many impulses are passing between t1 and t2 (until start is switched off or the period between the two impulses generated by OL)

My VI is incompleted and can only count the number of pulses generated. Furthermore, I didn't implement any system of clearing (signal U2). It just makes the sequence of impulses starting from a sine wave and displays (an counts) them only when start button is on.


Here are my questions:

  • While input sine wave is flowing in realtime, the impulses are generated in a period of just 1s and this output does not seem to follow the real flowing of the sine. How do I register those impulses in real time?
  • How do I measure the time elapsed between t1 and t2 (time elapsed since the start button has been switched on and then off)?


Thank you for reading,


0 Kudos
Message 1 of 4

Can you please go to File->Save For Previous Version... and save back a few versions?   2016 would be plenty far enough.   Quite a few of us around here aren't equipped to open LV 2021 files.


What I can't tell from your description is where the hardware ends and where the software is supposed to start.


1. Are you using an NI data acq device?  Which one(s)?


2. Which of the nodes in your schematic are actual hardware that exists (or will exist soon...) independent of your program?   I note that "F1" and "ULC" are colored in red as distinct from the downstream logic gate and counter that are black -- is there a special meaning for the color scheme?


3. If needed, do you have the ability to convert the analog-looking pulses U0, start, and UL (maybe also clk?) into digital logic pulses?



-Kevin P

Present job ending soon. Need DAQ expertise? PM with serious opportunities.
0 Kudos
Message 2 of 4

Thank you for answering,


There is not any external hardware, it is all supposed to be implemented in a VI, including the wave generator input and the output display. Each signal flows inside this VI. This is an exercise to get practice with LabView and I'm using only it's "internal" functions.


Colors of schematics in screenshoot have no meaning, they just do what I explained hoping it's clear. I can implement them in any way I prefer, the important thing is that it should work with any periodic waveform and be able to measure its frequency.


I don't have the ability to convert analog pulses into digital ones. 


Please tell me if there is something else unclear.


I'm uploading some different versions of my VI, the ones LabView showed me as possible conversions by clicking File>Save for previous versions.

0 Kudos
Message 3 of 4

This is kind of a lot to tackle for your "first vi".


I won't be able to walk you through every step, but here are a few tips:


1. Be careful about datatypes.  For example, the "AND" operator isn't meant to be used with floating point values.  I for one have no idea what behavior to expect.


2. Keep in mind that in this purely software approach, "time" is a simulated quantity.  It comes from the sample rate of your simulated signal and the sample # in question.


3. The distinction between "digital" and "analog" isn't so important since you aren't dealing with data acq hardware.


4. It will be helpful to learn about creating sub-vi's.  Each stage of your processing  could be its own sub-vi.  This both cleans up your top-level block diagram and also (more importantly) lets you test and debug each processing step one at a time.



-Kevin P

Present job ending soon. Need DAQ expertise? PM with serious opportunities.
0 Kudos
Message 4 of 4