I build fpga VI in while loop to acquire AI signal and I need to intgrate this signal twice to obtain the velocity and displacement. I found integrator in Simulation and design but I can not put the integrator in FPGA while loop
Is it a regular while loop or timed loop? Can the integrated be used out side of the loop? For example, acquire your analog signal in one loop and pass it to a slower loop for integration.
Hi,
Thanks 4 reply
It is normal while loop.
The problem is that the integrator exist is simulation and design module
Is it possible to put another loop containg the integrator
From a VI under an FPGA target, look at FPGA Math & Analysis >> Control >> Discrete Linear Systems >> Discrete Normalized Integrator
Jim