How to do arbitration in LabVIEW FPGA

[vicky2889]

Hello Everyone,

I want to do arbitration in LabVIEW FPGA. But i am not getting how to do that, i searched for that but unable to understand exactly from where i can select arbitration options out of the three arbitration options available in LabVIEW FPGA: Always Arbitrate, Arbitrate if Multiple Requester's only and  Never Arbitrate. 

Friends i am unable to find from where i can select all these options or i have to design these options.

Please help me in this regard.

I have seen these pages 

http://zone.ni.com/reference/en-XX/help/371599J-01/lvfpgaconcepts/arbitration_options/#Arbitrate_if_...

http://zone.ni.com/reference/en-XX/help/371599K-01/lvfpgaconcepts/arbitration_timing/

Thanks 
VIKAS

[wiebe@CARYA]

The node is defined in the project. The item is configured there. Where you configure it, there is a tab to set the arbitration.

[vicky2889]

Thanks 

So, if there are four request lines to the system requesting simultaneously. In that we want to give the acknowledge to the one which sent the request first, then to the line which sent the request after first etc.

for four I/O lines we have to take four I/O connectors.

In that case we have to set the arbitration option (like arbitrate if multiple requests only ) in all four I/O connectors ??. Also i don't know how to connect all four I/O connectors together so that the arbitration done for 4 I/O lines.

Can you please help me in this regard?

Thanks

[wiebe@CARYA]

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@vicky2889 wrote:

So, if there are four request lines to the system requesting simultaneously. In that we want to give the acknowledge to the one which sent the request first, then to the line which sent the request after first etc.

for four I/O lines we have to take four I/O connectors.

In that case we have to set the arbitration option (like arbitrate if multiple requests only ) in all four I/O connectors ??. Also i don't know how to connect all four I/O connectors together so that the arbitration done for 4 I/O lines.

Can you please help me in this regard?

---

We can help, but we need a bit more information.

I usually try to put everything in single-cycled-timed-loops (SCTL). As long as each I/O node is accessing a unique port, you don't need arbitration at all. And since it's all in a SCTL, it's all effective at the exact same time so you don't need synchronization either.

You can even put all I/O nodes in a SCTL, and communicate values to it from another loop (for instance if the SCTL is too fast to fit everything in it).

I think things are a lot easier that you seem to think, but I could be wrong (I don't know exactly what you thing is needed, and also don't know everything about FPGA).

Some code would be helpful...

[vicky2889]

Actually i want to do arbitration for 6 devices.

There are 6 request lines from 6 devices, i will connect all request lines to the DAQ FPGA card. Now i want to give acknowledge first to that device which sent the request first, then to that device which sent the request at second number.

e.g. there are six devices named as dev1, dev2, dev3, dev4, dev5, dev6. Then assume dev3 sends request to the DAQ FPGA card first then dev6 sends so in that case i want to give the acknowledge to the dev3 first and then dev6.

[wiebe@CARYA]

---

@vicky2889 wrote:

Actually i want to do arbitration for 6 devices.

There are 6 request lines from 6 devices, i will connect all request lines to the DAQ FPGA card. Now i want to give acknowledge first to that device which sent the request first, then to that device which sent the request at second number.

e.g. there are six devices named as dev1, dev2, dev3, dev4, dev5, dev6. Then assume dev3 sends request to the DAQ FPGA card first then dev6 sends so in that case i want to give the acknowledge to the dev3 first and then dev6.

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That's a bit too high level to tell where\if you need arbitration. This can be implemented in hundred different ways. I've done a lot on FPGA, but never needed arbitration on I/O.

[Intaris]

I don't think arbitration does what you think it does.

If you would activate arbitration for all four IO lines, you can simply have all 4 "writers" writing to them "in parallel" and LV FPGA will figure out which one gets control.  This will have nothing to do with any "acknowledge" you might want to implement.

I recommend: Implement 4 input lanes.  Have a single loop iterate through all four inputs and as soon as one is active, send it to the appropriate IO (preferably the data being sent will include which IO it's for).  Then it sends an acknowledge to that sender before iterating on to he next one.  Your iterating loop in between is then a mediator.  You need a mediatior isntead of arbitration because it seems you want a two-way communication. AFAIK, Arbitration is for unidirectional communication only, but I may be wrong because I've never actually used it.

But a more general question, what is the nature of the "acknowledge" in your design?

[vicky2889]

But how we decide that which one is receiving request first out of five devices. Can we have to use case statements for all this in FPGA VI or some other way ??

Secondly, can you please tell me the exact working of arbitration options in FPGA I/O?

If we set arbitration in one FPGA I/O how this arbitration works ?

I want to use acknowledge in my task because the transmission of data from particular devices depends on this acknowledge e.g if dev2 receives acknowledge first the data will be transmitted from dev2 first. 

[Intaris]

It almost sounds like you want events on FPGA. Doesnt work like that. Polling is really all you can do.

[vicky2889]

No you getting me wrong.

I don't need events on FPGA, i just want to receive request from devices to fpga and want to send acknowledge from FPGA to devices.

When the device receive acknowledge from FPGA, the device sends the events not from FPGA.

Secondly can you please tell me the exact working of arbitration in FPGA I/O as arbitration options are available on every FPGA I/O node, so whats the use of arbitration on one node itself.