FPGA front panel control initial state

[jditte]

Hi,

How can I define the initial state of an FPGA front panel control (the state the control is in when the bitfile is loaded, before the host has a chance to write to the control)? I tried using a property node for the value, but I get an error message that this node is not supported for an FPGA target. The properties of the control itself do not have an entry for a default state or an initial value.

Thanks,

JD

[Terry_ALE]

You can use local variables.

[MichaelBalzer · Accepted solution]

The initial value is what is on the front panel. If you want to change it, enter a new value, then right-click the control and select Data operations -> Make current value default. For arrays you can also set their size through the right-click menu.

[jditte]

Thank you, Michael! This seems to work. I wasn't sure initially. Whenever you have the FPGA front panel open on the development machine, the control would immediately be set to whatever is currently selected there. When I don't have the front panel open, however, and I read the state of the control from the (RT) host, it accurately reflects what has been set with "Make current value default".