03-08-2012 04:08 PM
Howdy--
Using LV 2011 FPGA, I always get coercion dots when reading or writing to/from FIFO or Memory items typed with a typedef.ctl. Do these indicate some extra use of resources in the compiled code, or are they harmless?
Thanks a bunch all, and have a great day.
--Brad
Solved! Go to Solution.
03-08-2012 04:35 PM
As long as being a typedef or not is the only difference it shouldn't matter. The dot comes from a regular element pretending to be a typedef. You're not changing type so new memory won't be allocated.
I32 typedef uses same memory as standard I32. If you push an I16 typedef into an I32 or vice-versa you may get a copy. For scalars this is pretty minor, even in FPGA.
03-08-2012 06:53 PM
Awesome. For a minute there I was afraid I'd have to abandon typedefs..a scary prospect when you're as scatter-brained as I am.
Thanks a bunch Taper for the quick reply. Be Well.
03-09-2012 08:41 AM
@bcro wrote:
Awesome. For a minute there I was afraid I'd have to abandon typedefs..a scary prospect when you're as scatter-brained as I am.
Thanks a bunch Taper for the quick reply. Be Well.
Too answer this question yoursefl you could use
Tools >>> Profile "Show Buffer Allocations...
To bring up a toll that will show where the buffers are being created.
Ben