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FPGA: R-series scan mode

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Is the  FPGA Scan Mode available for RT PXI systems using R-series boards? Or can you only use the FPGA Interface Mode for accessing the FPGA?

 

Thanks,

Craig

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Accepted by topic author craige

Scan interface mode cannot be used with r-series devices as far as I know so you will want to use read/write nodes and DMA FIFOs to communicate with the FPGA.

Matt J | National Instruments | CLA
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Scan mode is more useful on hardware that has IO that isn't static.  Having a cRIO with IO modules that you can put in and out means lots of work everytime your hardware changes, which I suspect is why NI came up with the scan engine.  But for R series hardware the IO don't change (unless you have an expansion chassis).

 

Checkout the example finder for examples on all your various IO module types, and copy pieces of those examples into your own FPGA project.

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Hm, ok. Yea, its a little confusing because ni.com talks alot about scan engine with fpga but i havent seen anything that explicitly says crio/sbrio only. And if the r-series inputs are fixed wouldnt that make running something like the Scan Engine even easier?
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@craige wrote:
And if the r-series inputs are fixed wouldnt that make running something like the Scan Engine even easier?

Fixed for that model of that card.  I guess NI could come up with a single already compiled bit file for each R series card that just gives IO access.  But most people when they want an R series card they want it for reasons other than just reading data.  If you wanted that I'd recommend a cheap NI DAQ card.  An FPGA has the flexibility to do things like react to an input and change an output in a fraction of a microsecond.  That type of need is going to be specific to your application and no scan engine is going to satisfy your specific need.

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@Hooovahh wrote:
                    Fixed for that model of that card. 

 

Exactly, as opposed to a cRIO/sbRio configuration which changes all the time. This answer is sufficient. I just found the logic a little backwards (Fixed IO doesn't have scan engine support where reconfigurable IO does). Thanks for the insight. Would love  to see this R-series exception explicitly documented somewhere in the future. Thank you!

 

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Why would you spend the extra cash on the FPGA card and then not use the capabilities?

 

I'm not sure why you think this logic is backwards.  The R-Series card is just the FPGA.  That's all there is to it.  The other devices have multiple components.  It's entirely reasonable to want the deterministic OS while not needing the functionality of the FPGA.  In that case, the scan interface makes sense.

 

At what point does it make sense to spend the cash on the FPGA only card to be limited to a 1kHz data rate?

 

The idea of fixed versus flexible I/O doesn't mean it makes more sense for the fixed I/O to have a bitfile more so than the other.  You generally want a tool to make things easier where they can get more complex, not the other way around.

 

Why is this something that bothers you this much? 

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Im not bothered by the lack of scan engine support. As an engineer I like seeing information documented thats all. (Tribal knowledge and forums like stackoverflow dont cut it in my profession). That was my original question.

Of course it would be unconventional to spend the money on a FPGA device and not utilize its full capability. I simply think the scan engine is a nice tool for getting started/checking signal inputs (especially combined with the distributed system manager). 100% of my applications utilize fpga interface node upon final delivery.
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