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[FPGA] Question about testing on dev computer

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I have an FPGA vi that I want to test on my development computer with the method shown here:


All well and good so far, but one problem- the 'custom FPGA for I/O' is effectively replacing my host VI as I understand it, but as well as simply writing data to FPGA nodes, the host VI also contains a few functions (not written by me but by NI) that are called to interact with the FPGA vi and set it up. Is there any way I can just call these VIs as I would on the host and have them setup the FPGA code when it is executing in simulated mode on the PC, or do I have to do something more clever?

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Accepted by topic author ToeCutter

Hi ToeCutter,


What kind of format do the functions in your Host vi take?


The easiest way to call these vi's while still using the test bench would probably be to add them to the automated execution Host vi (described at the end of the document), either before, during, or after the while loop, depending on their functionality.


Al C
National Instruments,
Application Engineer
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Your solution is obvious to me now you mention it, but would never have occurred to me! Like your Avatar, BTW! 🙂


Thanks for the help.


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