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FPGA Loop Rate with control

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If I request a loop rate which is too fast for the FPGA to route then LabVIEW will throw an timing violation error at compile time. What happens when I set the FPGA loop rate with a control instead of a constant and then request the loop to run fast than is possible AFTER I compile? 

 

See my screenshot.

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Accepted by topic author craige

The loop will take as long as it requires. The wait won't do anything if the rest of the loop takes longer to execute than the length of the wait. This is the same as what would happen in standard (non-FPGA) LabVIEW if you put a long operation inside a while loop, along with a wait for a shorter period of time.

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Thanks for the answer. As I'm compiling my code today this certainly holds true. Interesting how one approach is very forgiving and the other is catastrophic (i.e. compilation failure). Thank you!

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