FPGA IMAQ Mask

[pers.jolanta@gmail.com]

Hey,

I am doing some image processing using FPGA IMAQ module on my FPGA, and now I am planning to use this library IMAQ FPGA Mask.vi. There is a need to have a mask on the input, but if I am planning to have the same mask during whole acquisition-processing process, is it obligatory to send via FIFO this mask pattern all the time from Host, or can I just somehow 'save' it on FPGA? It seems weird to use FIFO to send constantly the same pattern, which is not complicated anyway. It's how it looks like in my code:

Please correct me if I do not understand something with this Mask idea 🙂 I am looking forward to your help. Thanks!

[pers.jolanta@gmail.com]

Hey,

maybe someone have an example of vi, where IMAQ FPGA Mask.vi was used? Or piece of code? I think I would be able to figure out how to deal with it then. 

Greetings!