FPGA_How to create an Delay of PWM Impulses but only when it changes to High signal

[Iceman2012]

Hello,

I have another problems related to cRIO- 9073, Labview and FPGA.

In the following OneNote file "Forum_1_part 2" (in the zip file) there is a detailed description about the problem it´s a Xilinx error.

Also i attached the Zip files with the project folders including each the FPGA.vi

Would be nice if anybody can help me there.

Thank you!

[Iceman2012]

Here it´s not about a Xilinx error!!!!

[JuanG]

Hi Iceman:

I don't have OneNote at this moment. Could you attach the description as a Word document, or post it here.

Thanks

Juan Gil

NI Mexico

[JuanG]

Hi Iceman:

I don't have OneNote at this moment. Could you attach the description as a Word document, or post it here.

Thanks

Juan Gil

NI Mexico

[JuanG]

Hi Iceman:

I don't have OneNote at this moment. Could you attach the description as a Word document, or post it here.

Thanks

Juan Gil

NI Mexico