10-24-2009 07:59 AM
10-26-2009 10:42 AM
You can generate a derived Clock by right-clicking the "40MHz Onboard Clock" in your project and select "New FPGA derived Clock".
Christian
10-27-2009 06:41 AM
Thank you!
I need four phase clock with 0 degree,90 degree,180degree,270degree.
use clip ,I can get it, but compiled error.
10-27-2009 07:54 AM
To have a 250MHz clock with 90/180/270/360 degree phase shift, you would need a 1GHz clock (4 times faster) to add the necessary delay to each of the clocks.
This is not possible with this hardware.
Christian
10-27-2009 09:27 AM
You'll have to instantiate a PLL in a CLIP to get the 4 different phases of the 250 MHz clock. You can instantiate this manually or use the Xilinx coregen GUI.
-RB