Hi,
I need to execute a while loop at the falling edge of an external clock. Clock frequency may vary from 6Hz to 133Hz (user can change this at run-time).
Please see attached VI. It generates a pulse train at Counter 0. That output drives Counter 1 to generate another pulse train. I need counter 1 pulse train output to trigger the while loop. hence, I use counter 3 sample clock source to be counter 1 output and use wait for next sample clock.vi to iterate accordingly.
Soon as I hit run, this works well for about 1 minute. Then throws this error. -200714 : SignalGeneration v1.0.vi<append>
<B>Task Name: </B>_unnamedTask<BC>
Although error message description is useless, I think this should be due to some sort of a buffer over flow. Anyone got a better idea to do this operation or fix this issue?
Really appreciate if anyone can help.
N.B. this runs on PXIe-6358 installed in PXIe-1082 chassis
