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Create dynamic Feedbacknode on FPGA

I'm trying to create a dynamic feedback node in an independent Vi. The idea is to use a FIFO and fill it with the Data and start reading it with a dynamic delay.

 

For this I would need to pass a Vi defined FIFO to my Feedback Vi. But if I wire the FIFO Methodenode to a FIFO control in the Feedback vi there are no methods available. My current implementation only allows to define the FIFO via a constant in the subvi. This would require a seperate Vi for each call of this subvi.

 

Is there a way to pass FIFOs to a subvi? Is there a better way to implement a feedbacknode with dynamic delay?

 

I attached my current idea of an implementation.

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You should be able to pass a FIFO referene into a VI with a FIFO Control. Ensure the control is configured correctly with all the methods you need to use in the VI. 

 

The Discrete Delay node provides dynamic delay capabilities. Unless you need additional functionality I would suggest using that node. If you do need to build your own library, you will want to use the most efficient memory for the maximum delay of your algorithm.

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