Create PWM using a NI 9402 with phase shift

[OnlyOne]

If i change the last working frequency 23.439 to 23.440 (only 1Hz more) then i see for about 1sec the signal/frequency on the scope but then it goes down to 0V.

Currently i set it to duration 5sec. And at each restart i have for one second the signal.

I changed the size 10 array to size two (only T F) and to only one line instead of two but this makes no difference.

[OnlyOne]

I replaced scope, NI9402, NI cDaq 9171, USB wire but same result.

So its not a hardware problem.

[cbutcher]

Can you try wiring the input boolean array to a For loop with indexing disabled then out with concatenate tunnel and a few iterations to duplicate the array and then try writing that (so perhaps 100 samples instead of 10) and setting the duration to a longer time?

I have no particularly good reason to believe this will change anything but perhaps there's some problem with the necessary regeneration speed? I'll try and find a suitable piece of documentation later and check if there's any information about that.

[OnlyOne]

Ok, now i have again by size 10 boolean. Here the last working freq is 23.426Hz (Which is less than the last working frequency with boolean size 2).

When i set the for loop to:

1 -> 23.4kHz (200us/)

2 -> 46.7kHz (50us/)

3 -> 70,2kHz (50us/)

4 -> signal appears for ~1sec

5-> signal appears for ~1sec

6->140,5kHz (2us/)

7->1635kHz (5us/)

8->187kHz (5us/)

9->211kHz (5us/)

[OnlyOne]

Currently the attached screenshot.

I create always a size 100*10 array and calculate the rate by the given frequency.

[croohcifer]

Can you add the "DAQmx Is Task Done" VI after your Stall Data Flow?  It may be that the DAQ driver is throwing an underflow error but you're not seeing it.  (The DAQmx Clear might suppress that error.)  Is Task Done should report driver errors.  My guess is that there's an underflow in the onboard buffer, which I've seen happen with small circular buffers.

[croohcifer]

Actually, forget all this nonsense with the DO tasks.  With small numbers of samples, you could run into onboard FIFO underflows.  With larger numbers of samples, you'll likely still run into underflows since your number of samples will be larger than the very small (127 sample) onboard buffer and will have to continuously refill over USB, which is a recipe for intermittent underflows at the rate you want. 

Just do it with two CO tasks like you originally mentioned.  The CO Frequency create virtual channel VI supports a "frequency", "duty cycle", and "initial delay" input.  Make two tasks, one with duty cycle A, and one with duty cycle B.  Make task B have an initial delay necessary to get your 180 deg offset, and then make task B trigger off of task A's start trigger signal to align the generation starts.  They won't drift since they reference the same backplane oscillator.

[OnlyOne]

Hi Croohcifer,

Can you create an example on how to do this what you describe?

Thanks

[Michael_Munroe]

Please check the sample rate input of the DWDT Boolean Array to Digital function.  The default is 1KHz and it will override your sample clock and expand the array to force the lower frequency.

[cbutcher]

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@croohcifer wrote:

Actually, forget all this nonsense with the DO tasks.  With small numbers of samples, you could run into onboard FIFO underflows.  With larger numbers of samples, you'll likely still run into underflows since your number of samples will be larger than the very small (127 sample) onboard buffer and... 

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If you read the specification for the cDAQ chassis mentioned you'll see for parallel IO modules (like the 9402) the FIFO for regeneration allows 2047 samples for DO. There's a list here of the modules for Digital I/O regarding series vs parallel (link). Somewhere I've seen a whitepaper discussing the two, but I can't find it now...

Available counter tasks are typically far fewer and running two tasks for such a (in principle simple) problem seems fairly wasteful. Then again, with a 1-slot chassis, maybe it doesn't matter.