Coregen MACC

[St3ve]

Hi All, I think this may be obvious... but can anyone see why the Coregen MACC isn't working for me. Regards, Steve.

[St3ve]

Appoligies, I didn't manage to attach the files!

[RavensFan]

Can you give some more information?

You have a zip file full of odd files, and you ask why something is not working.

What are all those files supposed to do?

[St3ve]

Of course...

The zip file contains a project with an R-Series target (running on Dev Computer). There is one FPGA VI (MACC Test.vi) with two SCTLs. The top loop contains a DSP48 node from the palette configured as a MACC - which works. The lower loop contains a MACC configured using Coregen - this is currently refusing to multiply-accumulate anything.

This is the first time I have attempted to use Coregen and I think I have made an error configuring it but I can't see it!

Regards,

Steve.

P.S. The additional files are the support files for the Coregen IP.

[St3ve · Accepted solution]

After a bit of thinking I realised my own stupidity. The default input bitwidths are 16, the default accumulator is 48 bits and the default output is 16. So obviously the contents of the accumulator is going to lose its LSBs when it is output! Hence it looking like nothing was happening!