Best way to synchronize multiple FPGAs

[jlgeris]

I have multiple PXI-7833R FPGAs and I need all of the AIs to be sampled at the same times (across all FPGAs). As I sample all of the individual AI channels, I buffer the data (write to DMA), scan it and check for a user defined trigger in a different loop. Once I discover this in one channel, I save the data from all FPGAs. In terms of synchronizing the sampling, I had begun, from one FPGA, to send a signal over the PXI trigger line to tell the others to sample, but I assume this does not guarantee synchronization. If I base all of the separate FPGA VIs off of the PXI clock, how do I synchronize the loops to sample at the same clock times?

Thanks

[Christian Mergl · Accepted solution]

Hi,

There is a great example shipped with LV FPGA named "RIO Master-Slave - R Series.lvproj". Just use the Example Finder to open it. 

It demonstrates how to use the PXI Trigger lines for synchronization of different measurements on multiple FPGAs.

Hope this helps,

Christian

[jlgeris]

Thanks Christian,

That is an awesome example. Let me ask you this. If I wanted to send a message between the Master and Slaves at a specific point, would I have to funnel this through the Host?

[Christian Mergl]

Hi,

Well, if it's not very timecritical you could pass messages through the host, thats right.

Another way, which is quite hard to implement though, would be to use the other available pxi trigger lines to send messages directly from one FPGA to the other. You would need something like a handshaking, a kind of master who directs which slave is allowed to send, a kind of clock for synchronization and so on.

I cannot give you detailed information, since I never did that by myself, but I know other projects where this works quite good.

Maybe another forums user can give you some better advice.

Thanks,

Christian