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Batch compile for FPGA?

Dear all,

I have an FPGA VI with many subVIs in my project. I would like to compile the entire project at once, but I can't seem to find a way to do this. So right now I have to pull up 30+ subVIs individually and compile them at the rate of about one every 20 minutes, which is really inconvenient.

Is there any way to do a batch compile of my project?

Thanks,
Dave Kielpinski
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This doesn't work for statecharts (which have a similar problem). But have you tried right clicking on the project in the project explorer and selecting mass compile?
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When I compile a program for FPGA, I just compile the main vi.  It automatically compiles all the sub-vis as part of the program, and generates the FPGA code for the entire program.

When you compile sub-vis, I am pretty sure you are wasting your time.  The only reason you would want to compile a sub-vi is if you want to run it as a standalone routine for testing.

Next time you compile your program, just compile the main vi and see if it runs properly.  You can delete all the FPGA bitmaps for the sub-vis.

Bruce

Bruce Ammons
Ammons Engineering
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Thanks for your suggestions.

Matt, I have tried "Mass Compile" and it is nothing to do with the FPGA. It just opens all your VIs, resaves them, and relinks them to their subVIs. This helps with some cross-linking issues.

Bruce, the behavior you describe is what I would have expected initially. However, it seems like I do have to recompile all the subVIs. Right now I don't see anything changing on the FPGA side if I recompile my FPGA shell VI, but not my subVIs.

It makes some sense that compiling the FPGA shell VI would not automatically recompile all the subVIs - the full compile including all subVIs takes about three hours, as compared to less than an hour to recompile the shell VI alone. So there is a strong reason to want subVI compiles to be independent of the shell compile.

Thanks,
Dave
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OK Bruce, you are right. The problem I'm having is not related to improper compiling. I wish it was (sigh...)

Thanks,
Dave
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Hello,

 

I attach a VI which I originally found on the forums which has saved me so much time!

It allows for the mass compilation of FPGA bitfiles for different targets.

I have slightly improved the original version by cleaning up the front panel, error wiring, and reference closing which massively cut down on RAM usage and # of windows open.

 

I hope that it saves you as much time as it has saved me. I wish I could give credit to the original author.

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Hi Gryffin,

 

mind to share this VI for LabVIEW <=LV2020?

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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LabVIEW2020 Version attached!

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