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1D Lookup Table in LabView FPGA

Hi everyone,

 

I want to store a varistor's VI-characteristic as a lookup table (current input, voltage output). I am using NI cRIO-9082 FPGA as my controller.

 

But LabVIEW FPGA's 1D lookup table does not seem to allow me to modify the input element values, but only the output element values. I am wondering if there is anything to let me be able to customize the lookup table input values? If not, is there any other ways to store a VI-curve?

 

Thank you very much!

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Message 1 of 17
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Hi Justin,

 

you need to convert/scale your input values to the value range of your lookup table.

 

Example:

I used an NTC with an additional resistor and measured the voltage. To convert voltage to temperature I used a LUT with 1024 elements. So I had to scale the voltage (0.0 to 5.0V) to the 0-1023 input range of the LUT using a simple linear scaling index = round(voltage / 5.0 *1023)…

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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Message 2 of 17
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The point of a LUT is fast access to indices that match values.

 

What you're looking for is an X vs Y table, suggesting you want extrapolation and interpolation.

 

You could do that, but on an FPGA it will be tricky. On a PC you'd simply extrapolate and interpolate, but that requires looping over the X's. Looping isn't convenient on FPGAs.. To avoid looping, you'll probably have to make a mapping between the X values an an index. You'll end up with GerdW suggestion.

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Dear GerdW,

 

Thank you very much for your reply. I have a follow up question: suppose I can curve fit and obtain an equation to describe the VI-curve of the varistor, but that equation contains terms raised to a non-integer power (x^n, where n can be negative and non-integer); is it possible to implement this via e^(n*ln(x))? I think LabVIEW FPGA does not have a function for x raised to any power of n.

 

Thank you.

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Dear wiebe@CARYA,

 

Thank you for your reply. I am thinking about fitting an equation on the VI-curve and implement that equation in LabVIEW code. But it requires the input raised to a non-integer power. Therefore, implementing such an equation will take more processing time compared to the LUT right? But on the other hand, LUT solution will probably not be 100% accurate since everything has to be converted to an integer. Can you let me know if my understanding is correct? Thanks!

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Dear GerdW,

 

To add on my previous reply: I noticed that the exponential and logarithmic operations are for inputs with restricted range [-1, 1), so I think they cannot be applied to my case as my input will be larger than 1, right? If it is true, this renders the LUT as the only option.

 

Sorry I am not that familiar with the high throughput math functions in LabVIEW FPGA. I look forward to your reply!

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Message 6 of 17
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Hi Justin,

 

  • using math functions with SGL datatype requires a lot of fabric in the FPGA.
  • Using the HighTroughput-Math requires you to design your values for certain ranges or for certain FXP datatypes.
  • A LUT requires (most often) just a simple input value scaling and some memory. It's implementation is very easy.

 

All options have their advantages and disadvantages, so you need to choose among them…

 

Best regards,
GerdW


using LV2016/2019/2021 on Win10/11+cRIO, TestStand2016/2019
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@JustinZZJ wrote:

Dear wiebe@CARYA,

 

Thank you for your reply. I am thinking about fitting an equation on the VI-curve and implement that equation in LabVIEW code. But it requires the input raised to a non-integer power. Therefore, implementing such an equation will take more processing time compared to the LUT right? But on the other hand, LUT solution will probably not be 100% accurate since everything has to be converted to an integer. Can you let me know if my understanding is correct? Thanks!


That sums it up nicely, for the most part.

 

Linear interpolation is probably not too bad on the FPGA though.

 

You'd still make a LUT, but convert your (scaled) X to it's floor, and get that Y and the next Y. Then interpolate the Y's with the fraction of X.

 

On FPGA, you shouldn't be worried about processing time. There are 2 concerns on FPGA: 1) will it fit 1 cycle and 2) will it fit my resources. If both are true, it will simply run. If one is false, there are often ways to get the code to fit, but that does take trickery and determination.

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Message 8 of 17
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Also consider alternatives.

 

Send the raw data from FPGA to PC\cRIO and convert there. Or convert on PC\cRIO before sending it to the FPGA.

 

If the conversion doesn't require high speed, you can even send a conversion requires to the host, and wait for a converted value.

 

You can use memory as a LUT. You can make a loop that allows the host to write the memory. So for each test, you can write a LUT as detailed as required. For instance, of you want to measure 50 points, that don't usually fit a general LUT, you can program a specific LUT.

 

And so on...  FPGA is a lot about improvisation.

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Thank you very much GerdW for your help.

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