Instrument Control (GPIB, Serial, VISA, IVI)

cancel
Showing results for 
Search instead for 
Did you mean: 

tnt 5002 interface

I set the above initialization to realise a tnt 5002 interface in one  chip  Turbo+7210 mode
I couldn't get it to generate interrupt. Is there anything missing in the above initialization?
 
Thanks
 
i try to communicate whit the Dos ..........whit  findlstn   Adress or ibln primary adress(pad)  and sad
I alwas have Device at address 7 ist not responding
 

 WriteGpib(SfrRst,CMDR);        // Reset the Turbo 4882 on the TNT SftRst=0x22 
 WriteGpib(0x80,SPMR);          // Place the TnT in Turbo+7210 Mode  
 WriteGpib(0x80,AUXMR);
 WriteGpib(0x99,SPMR);
 WriteGpib(0x99,AUXMR);     
 WriteGpib(E_ONEC,HSSEL);       // Configure the TNT for One Chip Mode
 WriteGpib(RstChip, AUXMR);     // Assert the local pon message
 WriteGpib(0x00, KEYREG);
                                // Set the Gpib Address
 WriteGpib(0x31, ADMR);
 WriteGpib(0x07, ADR0);
 WriteGpib(0xE0, ADR1);
WriteGpib(0x00,SPMR);            //Serial poll reponse
 WriteGpib(E_ADSC, IMR2);     // enable adresse change interrupt
        
 WriteGpib(E_DGB|E_DGA, HIER); // Select the deglitching circuit for the TNT 4882 
 WriteGpib(HLDI, AUXMR);        // Prevent for data reception
 WriteGpib(PON, AUXMR);         // Clear the Local pon message             
// if aderressed to listen  or adress
if(ReadGpib(ADSR) | LA)    // define LA 0x04
{.........
...........
 
0 Kudos
Message 1 of 151
(5,312 Views)
Let me clarify a couple things first.

Turbo+7210 mode is not implemented in the TNT5002, only One-chip mode and a 9914 mode are implemented. It is not necessary to set the ONEC bit in HSSEL as it is set by default. The beginning of your code is not necessay as it assumes non One-chip mode.

How do you determine if an interrupt has occurred? Do you just wait for your software ISR to execute? Have you tried reading ISR2 to see if the ADSC interrupt is asserted?

I see you are reading the ADSR and branching based on the LA bit. When you execute this code is the LA bit set?

Also, when you do a FindLst at the host does it find anything at address 7?
0 Kudos
Message 2 of 151
(5,288 Views)

 
yes i have try to read the ISR2 Register but the result is ISR2=0  and the ADSR give me 0x40(ADSR value is 0x40 , 0x40 is ATN clear)  , and when i do a findLst at address 7 i didn't find any thing it still answer  device at adress 7 is no reponding....... is my Code correct?
 
 
I am sorry for my englisch  i am french, I leave in France
Thank You..........
0 Kudos
Message 3 of 151
(5,283 Views)
Following the FindLstn can you read the following registers and report the values?

ISR0
ISR1
ISR2
ISR3
STS1
STS2
ADSR
0 Kudos
Message 4 of 151
(5,274 Views)
Hello Mr Collin
 
yes i have try to read the ISR2 Register but the result is ISR2=0  and the ADSR give me 0x40(ADSR value is 0x40 , 0x40 is ATN clear)  , and when i do a findLst at address 7 i didn't find any thing it still answer  device at adress 7 is no reponding....... is my Code correct?
 
 
I am sorry for my englisch  i am french, I leave in France
Thank You..........
 
Can't i have your e-mail ?
Can' t'you help me in futur , i am student and for my praktika, i have to write a Gpib aplication whit the tnt 5002,  now i am try to gate a communication between the tnt 5002 and the gpib_pci ...
Thank you Mr Collin.............
0 Kudos
Message 5 of 151
(5,276 Views)

Yes here are the value

ISR0=0x00
ISR1=0x01
ISR2=0x00
ISR3=0x00
STS1=0x8F
STS2=0x9A
ADSR=0x40
 
thank you..
 
0 Kudos
Message 6 of 151
(5,272 Views)
 
 
i have make a mistake ISR1=0x00
0 Kudos
Message 7 of 151
(5,268 Views)
Those all seem to be the default values for the registers. It is as if nothing is happening inside the TNT5002.

Please do the following test after your initialization routine:

Write 0x11 to CNT0
Write 0x22 to CNT1
Write 0x33 to CNT2
Write 0x44 to CNT3
Read CNT0
Read CNT1
Read CNT2
Read CNT3

Reply with the values you read from each register.
0 Kudos
Message 8 of 151
(5,243 Views)
 
I do it and i read the new  value..
ReadGpib(CNT0)=0x11

ReadGpib(CNT1)=0x22

ReadGpib(CNT2)=0x33

ReadGpib(CNT3)=0x44

 

 

 

WriteGpib(0xFF, IMR3);  //  i write IMR3=0xFF

ReadGpiB(IMR3);            // I read 0xFF

WriteGpib(0x02, AUXMR);// Reset chip

ReadGpib(IMR3);    // i read 0x00

 

i thing my read and write work propertly,,,,

to drive the tnt 5002 in gen 4882 mode what i have to do? , i have assert the pin mode to gnd...

 
 

Can't i have your e-mail ?

Can' t'you help me in futur , i am student and for my praktika, i have to write a Gpib aplication whit the tnt 5002,  now i am try to gate a communication between the tnt 5002 and the gpib_pci ...

Thank you Mr Collin.............

0 Kudos
Message 9 of 151
(5,235 Views)
Can you double-check the register addresses in your firmware? They are probably in a .h file somewhere. If you can read and write most registers you are in the correct mode which is GEN4882 mode.

Also, what is the value of the constant PON in your firmware?

After the FindLstn can you read the BSR and DSR and report those values?

I prefer to keep our communication on the forum so others may benefit.
0 Kudos
Message 10 of 151
(5,244 Views)