Response to IDN with TNT5002

[sprylogic]

Hi!!!

I am using TNT5002 in GEN4882 mode with a 16 bit microcontroller.

I am done with the initialization and register configuration part.I verified the same by scanning the device through MAX from NI... interfaced to PC using PCI-GPIB card.Address updation is taking place properly.

I am trying to data transfer between device and data bus.

I am writing the response for the IDN command into the FIFO,but aren't sure if it was getting written as I get no response at MAX front end.How can I view the received data from GPIB bus?(Guess must be feasible to read from FIFO)

My code pattern is as follows:

Cmdr = RstFifo // reset the fifo

Cfg = CCEN // only 8 byte transfert

Cnt0 = 0xFB // the twos cmpl of 5 in to the cnts reg

Cnt1 = 0xff

Cmdr = GO // start the transfert

Imr1 = Err // enable error

Imr0 = Glint // enable imr1 and imr0 interrupt

Imr3 = Done | Nff | Stop // enable some interrupt

followed by data transfer

Is anything missing.

Regarding read,I am reading FIFO untill NEf is cleared.

Suggestions awaited.

Jennnifer

[Steven_T]

Jennifer,

It doesn't look like you are skipping anything important in the setup. However, the TNT4882 Programmer's Reference Manual gives step by step instructions regarding the transfer of data.  You are initializing everything correclty, but you do not mention the code that writes the messae into the FIFOs.  Here is a link to the TNT4882 manual so that you can see page 4-7.

https://www.ni.com/docs/en-US/bundle/tnt4882-programmer-reference/resource/370872a.pdf

This page walks you through the setup and goes on to talk about the order of events that will actually get/put the data into/out of the FIFOs.

I hope this helps.

Steven T.

[sprylogic]

Hi Steve,

Thanks alot for the prompt reply.

We have done the data transfer configuration as per mentioned in the TNT4882 manual.The chip is getting recognized using MAX.(Measurement and automation explorer from NI).But whenever I send any data to TNT5002 from PC,nothing is getting written in the FIFO i.e.FIFO remains empty.At power up when I scan the device using MAX,the device gets configred as a listener and if I read BSR(Bus Status Register),it shows 0XA1 which means ATN,NDAC,REN are high.After sometime the device becomes talker with BSR indicating 0X31i.e.NRFD,NDAC,REN high.ARE we missing anything?

Thanks

Jennifer

[Steven_T]

Jennifer,

Sometimes it can be really difficult to debug a problem like this.  Looking at some of our examples, we also continuously Read from the fifo until it is empty.

The functions that you would be interested in include GPIB_PROG_IO, Setup_TNT_IO, and Read_Word.

I hope this helps.
Steven T.

[sprylogic]

Hi

I am facing a dificulty with done bit during GPIB write operation of tnt5002.The done bit sets only once ie first time write.i have configured the gfifo as 8 bit wide.I poll on the done bit to proceed to the termination phase after the cpu transfer expires .The gpib read operation is happening fine now and done bit sets at the end of each transfer, as in the when gpib transfer count expires.

when i attempt gpib write more times the program gets hang due to done bit not getting set. The settings done in the CFg register for write is as shown.

tlchlte=1,ccen=1,a/b=0,16/8=0.

Am i missing some setting.kindly suggest.

Jennifer 

[Steven_T]

Hello Jennifer,

Here is an excerpt from the TNT4882 manual:

For GPIB writes, the TNT4882 sets the DONE bit if the transfer count has expired and

the Listening GPIB devices have accepted the last byte of the transfer.

When you get to the point of checking if the transfer is complete (after you have arleady shoved all of the data into the FIFOs), check the count.  Also check on the listener side of the GPIB to see if the listener received all data into its buffer.  It is possible that the listener was performing some type of a hold-off because its buffer was full.

Please check these things to make sure everything else in the picture is working.  The TNT5002 should set the done bit automatically when these two conditions occur.

Steven

[sprylogic]

Hello Steven,

Thanks alot for the prompt reply.

What u have suggested  me to do is absolutely correct.The done bit sets only when the transfer count expires and in my case this is happening only during the first time write.During the next time the cfg registers are not getting incremented and it seems to be the problem that the listener is performing some type of hold off,but how do we rectify the problem.Is it possible to resolve the issue from the tnt side as it is managedby the controller  itself.

Awaiting your reply.Kindly suggest.

Jennifer

[sprylogic]

Hello Steven,

Thanks alot for the prompt reply.

What u have suggested  me to do is absolutely correct.The done bit sets only when the transfer count expires and in my case this is happening only during the first time write.During the next time the cfg registers are not getting incremented and it seems to be the problem that the listener is performing some type of hold off,but how do we rectify the problem.Is it possible to resolve the issue from the tnt side as it is managedby the controller  itself.

Awaiting your reply.Kindly suggest.

Jennifer

[Steven_T]

Jennifer,

You say that this problem happens the second time that you write.  Does the GPIB controller perform addressing between your instrument's writes (is it addressed as talker again and then readdress the listeners)?

If the answer is no, the TNT5002 is probably causing the listener to prematurely stop reading.  This could be done by the talker sending the EOS byte or asserting EOI.  If the listener is only reading once, it will only get the message before EOS or EOI happens.

If the answer is yes, then the problem is completely on the listener side.  Since this problem is on the listener side, the TNT5002 can't do anything until the listener hold-off is fixed.  The controller could do several things like sending a device clear command, but you may not have access to the program on the controller.

I hope this helps.
Steven T.

[sprylogic]

Hi!!

Is it possible to do gpib read on interupt based,if so which interupt should be considered.As per the tnt5002 manual the INTA# pin asserts when the INT bit inside the ISR3 asserts.Can i use the DI interupt for gpib data reception.what should be the status of the INTA#  pin when unasserted.Earlier i was polling the NEF bit for gpib read, is it advicable to interupt on the same bit for read operation. Kindly suggest.

Regards

Jeniffer.