NTN4882

[Shamsan]

Hello,

I'm using TLCINT and STOP Interrupts.

When TLCINT interrupt occurs I read the Data from FIFOB and reply by putting the data on FIFOB, then GO command.

Sometimes TLCINT interrupt occurs and when I read FIFOB I find the same data I put before.

How can I resolve this conflict?

Thanks.

[Collin M]

TLCINT is just the logical OR of ISRs 1, 2, and 3. Do you know what specific interrupt bit is setting in ISR1, 2, or 3 that causes TLCINT to assert?

Also, you need to do some other configuration when switching from receiving to transmitting before writing the GO command.

Can you correlate the failure you are seeing with any error at the host? Are you using NI-488 software for the host?

When you are reading the FIFOs, how do you determine if there is valid data in the FIFOs and how many bytes you should read?

Sorry for the rambling answer but your initial post didn't give me much detail about your problem.

[Collin M]

TLCINT is just the logical OR of ISRs 1, 2, and 3. Do you know what specific interrupt bit is setting in ISR1, 2, or 3 that causes TLCINT to assert?

Also, you need to do some other configuration when switching from receiving to transmitting before writing the GO command.

Can you correlate the failure you are seeing with any error at the host? Are you using NI-488 software for the host?

When you are reading the FIFOs, how do you determine if there is valid data in the FIFOs and how many bytes you should read?

Sorry for the rambling answer but your initial post didn't give me much detail about your problem.

[Shamsan]

Thank you Collin,

This is what I did:

I knew that TLCINT is an ored interrupts from ISR1 where I'm using RXEND.

Prepare Chip for RX Data from GPIB by:

CFG=0x28

CNT1=0xFF

CNT0=0xF0

CMDR=0x04

when INT occurs, TLCINT , I do :

nBytes= CNT0

nBytes= nBytes-0xF0

Read nBytes from FIFOB

then perform again the above blue statements.

--------

When I reply, I do:

CFG=0x08

N= 2's comp of Num bytes reply

CMDR=0x10

CNT1= 0XFF

CNT0=N

Write Num to FIFOB.

CMDR = 0x04

When STOP Interrupt occurs, I write the above blue statements.

I'm looking for a way to stop interrupt while reply not yet dispatched over GPIB from FIFOB.

Because any coming Interrupt would make me read FIFOB, which is the dispatched data, i.e data I have put in FIFOB.

[GPIB_Guru]

I posted this yesterday and it may help you....http://forums.ni.com/ni/board/message?board.id=140&message.id=19803

Message Edited by GPIB Guru on 10-20-2006 07:14 AM

Message Edited by GPIB Guru on 10-20-2006 07:15 AM