NAT7210 Programing

[vibro]

Hello!
I have a question.

I want to use NAT7210 as a controller.
I can't get SRQ bit Interrupt [ISR2].

Electrically, the SRQ signal is input from the connected instrument.
SRQ Pin of 75162B(Bidirectional Transceivers IC) is Low level.
But, SRQ Pin of NAT7210 is not Low level.
It works as a slave . (not receiver)

I guess that I should control T/R2 out.
But, I don't know the method.
How should I do to change this state?

このメッセージは　02-14-2007 01:07 AMに vibro が編集しています。

[Steven_T]

Hello Vibro,

I would first recommend you to double check the manual on pag 7-6: http://www.ni.com/pdf/manuals/370875a.pdf

It shows the correct way to connect the NAT7210 to the 75162 transceiver. 

You can control the T/R2 line by using the address mode register ADMR.  Bits TRM0 and TRM1 will allow you to control the function of the T/R2 pin.  This information is on page 3-7 of the manual.

I hope this helps!

Steven Trahan

National Instruments

[vibro]

Hello Steven-san.
Thank you very much for your E-Mail.

Sorry, I 'm not good at English.
I might question you on writing in the manual.
Please advice me.

I think that the circuit design is correct.

Both settings of TRM0 & TRM1 of ADMR are 1(TRUE).
And, CIC bit of ADSR is in the status of 0(FALSE).

What status is that CIC bit is TRUE? (i.e. Controler function is Active.)
 > Should the status be a COMMAND mode ? (i.e. ATN is low.)
 > Which of tca, tcs, and gts of AUXMR should I set ?

What should I do to control CIC bit?

[Steven_T]

Hello Vibro-san,

The CIC bit is only set when the system goes from idle to an active controller.  You can write 1E to the AUXMR register to Set IFC.  This will cause the CIC bit to change since it is now the controller in charge.  You can find this command and the details about it on page 3-24 of the manual.

I hope this helps!

Steven T
National Instruments

[vibro]

Hello Steven-san.

Thank you for the e-mail.

After chip Initialization, I did Set IFC.

I programmed it according to the following procedure.
Does it contain something mistake?

Chip Initialization.

AUXMR  0x02     Chip Reset  The local pon message is set.
AUXCR  0x99     sw7210(Switch To 7210 Mode)
                If the chip is already in 7210 mode, this write access writes to the 7210-mode SPMR.
ICR    0x2A     Clock frequency 20MHz
ICR2   0x80    
ADMR   0x31     Normal Dual Addressing
ADR    0x1E     Primary Address
ADR    0xE0     Secondary Address None
SPMR   0x00     Initial Serial Poll Response
AUXRI  0xE0     Initial Parallel Response
AUXRB  0xB4
AUXRG  0x4B
AUXRA  0x8C

//  IMR0 0x00     Interrupt Mask     (This is a content in another thread while questioning. )
IMR1   0x00     Interrupt Mask
IMR2   0x00     Interrupt Mask
AUXMR  0x00     Immediate Execute Power-On (pon)

The communication is started.  (I confirmed the transmission from the controller to the slave. )

AUXMR  0x1E     Set IFC
wait  100 micro sec
AUXMR  0x16     Clear IFC
AUXMR  0x1F     Set REN

AUXMR  0x12     Take Control Synchronously (tcs)
AUXMR  0x08     Request Control Command (rqc)

Send Command
    DCL(0x14)
    UNL(0x3F)
    Talker Address (Controler side address)
    Listener Address (Slave side address)

AUXMR  0x10     Go To Standby (gts)
AUXMR  0x0A     Release Control Command (rlc)

Send data
    *SRE32
    *RST
     :
    *TRG

IMR2    0x40    SRQIIE=1   Interrupt Enable

Electrically, The SRQ signal is input.

[vibro]

Hello. Please teach me.

Both settings of TRM0 & TRM1 of ADMR are 1(TRUE).

 ( Normal Dual Addressing (ADMR)  )

After chip Initialization, I did Set IFC.

When the SRQ signal is input, should I do Set IFC again?

[Steven_T]

Hello Vibro,

Setting IFC again should not be necessary.  You can use the BSR register to read the status of the control lines.  From here you can check SRQ as well as IFC.  This way you can make sure that everything is correct.  I would focus on the status of the SRQ coming from your instrument and then compare that state with the bit in the BSR register for SRQ.  Page 3-2 of the manual shows the bits that are in the BSR.

The program segment you posted above seems very reasonable.  I did not see any glaring errors that could cause you problems.

Let me know what the states are of the BSR register.  You may find that things are working.

Steven T.

[vibro]

Hello Steven-san,

Thank you for your e-mail.

I could get SRQ bit Interrupt.

I changed the setting of GLINT[IMR0] and SISB[AUXRI].

Because of the setting of SISB, the SRQI flag might already have been cleared when I confirmed SRQI bit.

Thank you very much for your kind support.