01-25-2007 02:15 AM
01-25-2007 06:15 PM
01-26-2007 01:44 AM
HI Collin, Thank you very much
I read some messages that you have sent before.
Now , my instrument explorer have detected my card. But my card did not send "*IDN" to the CIC.
Addition,I have the following questions:
1 How can I do if I want send "*IDN" to CIC?
2 Can I work with TNT4882 without any interrupt?
3 If I do not use DMA, dose the rate of data transmit fall so much?
thank you
01-26-2007 07:54 AM
01-26-2007 08:24 AM
1 How can I do if I want send "*IDN" to CIC?
Receiving *IDN and replying are normal data transfers, no different than sending or receiving other data. I recommend reading the GPIB Transfer Manager starting on page 4-11 in the TNT5002 manual. It would not be practical to explain the entire process here. The TNT5002 manual lists all the steps required for a transfer. Even though you are using the TNT4882 the TNT5002 manual applies as the two are register compatible.
2 Can I work with TNT4882 without any interrupt?
You can not enable interrupts in the IMRs and just poll the ISRs. However interrupts will be easier to work with. If you don't enable interrupts the host processor is going to spend a lot of time polling the ISRs. When there is a change to the TNT address state (becoming a talker or listener) a transfer is usually set up. The easiest way to detect a change in addressing state is with interrupts.
3 If I do not use DMA, dose the rate of data transmit fall so much?
Yes it does. However, even with DMA the transfer will be limited to a little over 1MB/s. Without DMA it will probably be a few hundred kB/s. Not implementing DMA will probably be sufficient for most applications as the amount of data transferred is relatively small. If you are only transferring a few hundred bytes or so it should not matter if you don't implement DMA.The hidden registers in the TNT4882 aren't really hidden and they are easy to access. I'll use AUXRA as an example. AUXRA is at offset 0x0A and AUXMR is also at 0x0A. To write to the AUXRA you simply need to write a '1' for bit 7 and '0' for bits 5 and 6 along with the actual bits you want to set. Writing the same bit pattern to AUXMR is undefined. The TNT will always know which register you are writing by examing the data as well as the address. So if you want to set the BIN and REOS bits in AUXRA you would write 0x94 to offset 0x0A. If you want to write CHIP_RST to the AUXMR you would write 0x02 to offset 0x0A.
01-27-2007 03:30 AM
01-27-2007 03:59 AM
Addition information:
when I press "write" botton , It display like this
When I excute the TNT_Out(R_cmdr,F_rhdf) in Setup_TNT_IO(), it immediately go back to (the following PIC), without any information feedback.
01-28-2007 05:37 AM
01-28-2007 10:04 AM
01-28-2007 07:27 PM
I have read the following registers :
sasr--------------------------0x00
sasr2------------------------0x00
sasr3------------------------0x00
sts1-------------------------0x3b
sts2-------------------------0x9b
isr0--------------------------0x07
isr1--------------------------0x00
isr2--------------------------0x93
and the following is my code of Setup_TNT_IO(),it just copy from ESP-488
void Setup_TNT_IO(int io_type, unsigned long int cnt, int term)
{
int testa;
unsigned long int twos_cnt=-cnt; /* Obtain the twos compliment cnt */
Requested_Count=cnt; /* Save requested transfer cnt */
TNT_Out(R_cmdr,F_resetfifo); /* Reset TNT fifos */
#if(USE_DMA) /* If using dma enable dma on */
TNT_Out(R_dmaenable, F_dmaon); /* the evaluation board */
#endif
TNT_Out(R_cnt0, (char)(twos_cnt)); /* Load twos compliment count */
TNT_Out(R_cnt1, (char)(twos_cnt>>8)); /* into TNT count registers */
TNT_Out(R_cnt2, (char)(twos_cnt>>16));
TNT_Out(R_cnt3, (char)(twos_cnt>>24));
/* If using timeouts */
if(Timeout.factor_index>0) { /* Set B_to bit and maybe B_bto */
TNT_Out(R_imr0,B_glint|B_to|((Timeout.byte_timeout)?B_bto:0));
TNT_Out(R_auxmr,HR_auxrj|Timeout.factor_index); /* Set time */
}
else {
TNT_Out(R_imr0,B_glint); /* Set write to imr0 to be sure */
TNT_Out(R_auxmr,HR_auxrj|0); /* B_to is cleared */
}
switch(io_type) { /* Switch to input or output */
case INPUT_BYTE:
TNT_Out(R_imr1, B_end); /* End transfer on eoi or eos */
TNT_Out(R_eosr, READ_EOS_BYTE); /* Set eos byte */
TNT_Out(R_auxmr,HR_auxra|F_hlde|((term&EOS)?B_endoneos:0));
/* Configure for byte input */
testa=F_input_config&~B_16bit;
TNT_Out(R_cfg , (F_input_config&~B_16bit));
/* Holdoff on end & enable eos */
TNT_Out(R_cmdr, F_go); /* Start transfer state machine */
TNT_Out(R_auxmr,F_rhdf); /* Release holdoff */
break;
case INPUT:
TNT_Out(R_imr1, B_end); /* End transfer on eoi or eos */
TNT_Out(R_eosr, READ_EOS_BYTE); /* Set eos byte */
TNT_Out(R_auxmr,HR_auxra|F_hlde|((term&EOS)?B_endoneos:0));
TNT_Out(R_cfg , F_input_config); /* Configure for word input */
/* Holdoff on end & enable eos */
TNT_Out(R_cmdr, F_go); /* Start transfer state machine */
TNT_Out(R_auxmr,F_rhdf); /* Release holdoff */
break;
case OUTPUT:
TNT_Out(R_imr1, B_err); /* End transfer on err */
TNT_Out(R_eosr, WRITE_EOS_BYTE); /* Set EOS byte */
/* Holdoff on all & enable EOS */
TNT_Out(R_auxmr,HR_auxra|F_hlda|((term&EOS)?B_xeoiweos:0));
/* Configure for word output */
TNT_Out(R_cfg , F_output_config|((term)?B_ccen:0));
TNT_Out(R_auxmr,F_hldi); /* Hold off immediately */
TNT_Out(R_cmdr, F_go); /* Start transfer state machine */
break;
default:
Generate_Error(EARG); /* If io_type incorrect issue EARG*/
break;
}
}