Industrial Communications

cancel
Showing results for 
Search instead for 
Did you mean: 

Gracefully handling EtherCAT slave connection and disconnection

Solved!
Go to solution

Does any one have any experience dealing with ethercat slave connection and disconnection while the system is running? Say you have a daisy chain of etherCAT slaves and the last one gets disconnected. From what I have seen the Scan Engine stops and goes to configuration mode. What if I want the system to just keep running as normal?

0 Kudos
Message 1 of 4
(4,130 Views)
Solution
Accepted by topic author MarkCG

Some thoughts:

 

1. You can use programmatic methods to implement the feature. You can detect the Scan Engine's mode periodically. If the mode changes to Config, you run Refresh Modules VI to let NI EtherCAT driver know the latest topology and then change the Scan Engine's mode to Active.

 

2. Have you tried to disabled the Watchdog of the slave devices?

0 Kudos
Message 2 of 4
(4,088 Views)

Hi Yin,

 

thank you you for pointing me to that kB, I wasn't able to find it by googling. I'm just in the design phase of things right now, but I want to make sure that the way the system is setup in a way that will support the way it will be used. Part of that is that some ethercat devices will be connected and disconnected to the master.  I think you are right that I will have to disable their watchdog.

 

If I recall correctly - switching the scan engine to configuration mode and back will cause all I/Os in the system to go to a default state.. that means the master's module I/Os will get reset. Am I right? Is there a way to make them retain the last state they were in? I suppose you could do it with direct FPGA programming but is that the only way?

0 Kudos
Message 3 of 4
(4,079 Views)
Solution
Accepted by topic author MarkCG

Hey Mark,

 

If I recall correctly - switching the scan engine to configuration mode and back will cause all I/Os in the system to go to a default state.. that means the master's module I/Os will get reset. Am I right?

Yes. You're right.

 

Is there a way to make them retain the last state they were in? I suppose you could do it with direct FPGA programming but is that the only way?

To my knowledge, no other way. Please refer to the safe value example to implement your own projects.

 
0 Kudos
Message 4 of 4
(4,061 Views)