DDR DIO Streaming Example for the NI PXIe-5644R

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DDR DIO Streaming Example for the NI PXIe-5644R » This example provides a double data rate (DDR) DIO interface using the front-panel VHDCI connector on the VST, capable of rates up to 125 MHz, or 250 MB/s, bi-directional. It is useful for high-bandwidth, low-latency data exchange with other devices.

Description: This example provides a simple source synchronous, double data rate (DDR) data transfer interface that is capable of streaming data to another DIO device at up to 125 MHz. The output physical interface requires eight DIO lines (one byte) for data transfer, one line for data valid signaling, one line for flow control, and Clock Out for forwarding the data clock; therefore, a total of ten DIO lines and the Clock Out line are required for this IP, enabling generation up to 250 MB/s. The input physical interface and bandwidth is identical with the exception that Clock In is used rather than Clock Out.

Additional Documentation:

• After Installation - C:\Program Files (x86)\National Instruments\LabVIEW 2012\examples\NI DDR DIO Streaming Example for the NI PXIe-5644R\Documentation\VST Streaming with DDR DIO.pdf

Compatibility:

• LabVIEW Version: 2012
• Hardware: NI PXIe-5644R

Dependencies:

• NI LabVIEW 2012 Support for NI PXIe-5644R 1.0 (NI MSI installer)

FPGA Footprint:

Xilinx Virtex-6 LX195T

• 18.3% / 22887 LUTs
• 12.1% / 30196 Flip-Flops
• 13.7% / 47 Block RAMs
• 30.5% / 195 DSP Slices
• >90% compile success rate

Latest Version:

• DDR DIO Streaming Example for the NI PXIe-5644R 1.0.0 (LabVIEW 2012)

Previous Versions:

• none available

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