Description
Description-Separate-1Overview
This IP performs decoding on the Reed-Solomon encoded data packets.
Description
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Steps to Implement or Execute Code
The IP specifications are as mentioned below.
- Decodes Reed-Solomon code (255, 239) encoded bits.
- Code word length(n)= 255 symbols
- Data word length(k)=239 symbols
- Parity length(2t)= 16 symbols
- Supports shortened codes.
- Symbol size= 8 bits
- Error correcting capability= 8 symbols
- Field generator polynomial p(x)= x8 + x4 + x3 + x2+ 1
- Code generator polynomial g(x)= (x + a0)(x + a1)(x + a2)…(x + a15);a= 0x02
- Fully synchronous design using a single clock, with speed optimization.
- Maximum clock rate= 51MHz
- The IP handles one symbol(8 bits) per clock cycle and requires a maximum of 850 clock cycles to process a block of n symbols
NOTE: The example requires Modulation toolkit to perform Reed-Solomon encoding on the PC.
Requirements
Software Requirements:
LabVIEW FPGA 2010
LabVIEW FPGA RF Communications Library 3.0 available on NI Labs
Hardware Requirements:
PXIe-5641R
**This document has been updated to meet the current required format for the NI Code Exchange.**
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