Acquisition and Data Logging of Vibration signals on CompactRIO system

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Overview
CompactRIO makes remote acquisition and data logging easy! This project demonstrates the acquisition and data logging of Vibration signals with the NI 9233 C-series DSA module.

Description

This example is an adaptation of several shipping examples and is written to use a cRIO-9004 (CompactRIO embedded controller), cRIO-9101 (cRIO 4 slots FPGA backplane), and NI 9233 (4 Ch, 24 bits, IEPE enable DSA module). However, the project could be modified to use any CompactRIO controller and chassis along with a 9233. This example project also highlights several common Real-Time and FPGA programming techniques such as:

• Passing data from the FPGA to Real-Time using controls and indicators
• Using Interupts to trigger code execution
• Starting and Stopping certain C Series Modules
• Using property nodes with C Series Modules
• Aquiring data from an FPGA using I/O Nodes
• Passing data from the FPGA to Real-Time using a DMA FIFO
• Converting binary data from C Series Modules to nominal data
• Creating waveforms
• Calling into the FPGA from Real-Time

Steps to Implement or Execute Code

1. Download, unzip, and open the attached project.
2. If you have an NI cRIO-9004, NI cRIO-9101, and NI 9233 then change the IP adress of the target in the project to match your target and continue to step 5. Otherwise, continue to step 3.
3. Right-click on the project title, select New >> Target and Devices, and choose your target.
4. Drag the files from the 9101 target down into their respective locations under your target.
5. Right click on the deployment target and select connect.
6. Expand the cRIO chassis, exapnd the FPGA target, expand Build Specifications, right-click on the FPGA build specification, and select build.
7. Once the FPGA code is finished compiling, open the rt.vi and run it.
8. Watch the front panel update and click the log button when desired.
9. After stopping, transfer the file back to the host machine.
10. Open ViewData, run it, and navigate to the file when prompted.

Requirements

Software

LabVIEW 2012 or later

LabVIEW Real-Time 2012 or later

LabVIEW FPGA 2012 or later

NI Sound & Vibration 2012 or later

Hardware

NI 9004 and 9101, or another CompactRIO controller and chassis, and an NI 9233.

Additional Information or References

VI Snippet

**This document has been updated to meet the current required format for the NI Code Exchange. For more details visit this discussion thread**

[2280513919]

• I have used a C-RIO 9039 with 4 AI Modules (9229 Cards) in order to read vibration raw data from raw terminals of VM600 (i. e. Meggitt Products that are available in the field as vibration data acquisition cards). Due to tiny duty cycle of tacho signal, I have to increase the sample rate of the AI cards to 25 KHz. Therefore I define four FIFO of 100000 elements (i.e. 4*25000) for each AI Module in the FPGA Code. However, while I compile the FPGA Code I face the following error (attached as a figure). Is it possible that the C_RIO could not support using the AI Modules with 25 KHz? Or should I change my FPGA Design in a way that I can solve this error? I would be grateful if somebody could help me with this problem?