Synchronization of two PXI-6255 boards by signal AI_Sample_Clock

[Alex_S.]

Hi.

I’ve got two PXI-6255 boards placed in chassis PXI-1031. Chassis are connected with comp by PXI-8360 (in chassis) and PCI-8361 (in comp), i.e. by interface MXI-Express. I need to use register level program on OS QNX 6.4.

In this construction both PXI-6255 boards acquire samples simultaneously (but not synchronized any way). Samples transferred by DMA into comp memory. Both PXI-6255 are doing it excellently.

Now, I want to synchronize scans of both PXI-6255 by signal AI_Sample_Clock.

For second board I’m setting bitfield AI_START_Select as 1 (PFI 0 source). For first board - bitfield AI_START_Select stays 0.

For second board I’m setting bitfield PFI0_Output_Select as 8 (in DDK function exportSignal if signal is kAISampleClock, than PFI_Output_Select = kAI_Start_Pulse and kAI_Start_Pulse = 8). Also, I’m setting bit PFI0_Pin_Dir as 1 (out).

Now I suppose, that after AI_START1_Pulse for every PXI-6255, they are waiting for first signal AI_Sample_Clock. For first PXI-6255 AI_Sample_Clock is internal signal. This signal starts scan for first board and also it is tranffered on PFI 0 terminal. Second board wait for AI_Sample_Clock incoming from PFI 0 source, which will be start scan for this board.

This is like as simple, this must work, but this is't work. First board produces samples, but second – not, none byte.

I don’t understand, where is my mistake. Help me, please.

[Steven_T]

Hello,

If your explanation is correct, I can see how things would go wrong.

1. The code for board 1 is unmodified.

2. board 2 is using PFI0 for the sample clock

3. board 2 is setting PFI0 to output

The result of this setup ould be that board 1 would operate as before, but board 2 would do nothing. Instead you should try the following.

1. board 1 should export its sample clock over PFI0. It should continue to use its own internal clocks for the sample frequency.

2. board 2 should then use PFI0 for its sample clock. The PFI0 pin of both boards should be connected together.

3. start board 2 before starting board 1. That way, board 2 will be set and waiting on the sample clock from board 1. Otherwise, board 2 may not get the first few measurements that board 1 makes.

I hope this helps,

Steven T.

[Alex_S.]

Hello, Steven, thanks for response.

I must ask you, excuse me, please. In my explanation mistake was really.

It was:

For second board I’m setting bitfield PFI0_Output_Select as 8 (in DDK function exportSignal if signal is kAISampleClock, than PFI_Output_Select = kAI_Start_Pulse and kAI_Start_Pulse = 8). Also, I’m setting bit PFI0_Pin_Dir as 1 (out).

It must be:

For first board I’m setting bitfield PFI0_Output_Select as 8 (in DDK function exportSignal if signal is kAISampleClock, than PFI_Output_Select = kAI_Start_Pulse and kAI_Start_Pulse = 8). Also, I’m setting bit PFI0_Pin_Dir as 1 (out).

This mistake was in explanation only, was not in code.

What’s mean a “The PFI0 pin of both boards should be connected together”. As I think, PFI0_Pin of 1st board should be set out, PFI0_Pin of 2st board should stay in (as default). This change for 1st board I make before it starts. What else I should make?

In my code really 2^st board starts before 1^st board.

Would you may confirm that for first board I should set 8 in bitfield PFI0_Output_Select?

I hope you help me.

[Steven_T]

Hello,

What’s mean a “The PFI0 pin of both boards should be connected together”.

I mean that you must physically connect PFI0 of board 1 with PFI0 of board 2. There is no magic connection between the two boards, so you must connect them together with a wire/cable.

First I would recommend checking that you are successfully exporting the AI sample clock from board 1. You can do this by connecting the PFI0 of board1 to an oscilloscope or a channel on board2 (you may need to sample faster than the exported sample clock to verify that the clock is exporting as expected).

If this does not yield any results, I recommend modifying the chip objects to output every register read and write so I can verify the behavior of your example.

Here is a post with an example of a useful list of register accesses generated from the running application.

http://forums.ni.com/t5/Driver-Development-Kit-DDK/X-Series-6321-amp-6323-Setting-Up-Interrupts/td-p...

Thanks,

Steven T.

[Alex_S.]

Hello, Steven

I suppose that the placing of two PXI-6255 boards in neighboring slots of chassis PXI-1031 guarantees physical connection of appropriate pins of PFI and RTSI buses.

Unfortunately I can’t use oscilloscope. Bus contacts are inaccessible inside of chassis PXI-1031.

Thanks for advice about register accesses. I’ll be do it, though it will take a time.

Thanks.

[Steven_T]

Hello,

Youa re attempting to use the PFI pins to export/import the signal. These are not connected using the backplane, which is why they MUST be connected physically using a cable or wire.

You could export the clock over RTSI, which is connected via the backplane.

Thanks,

Steven T.