10-29-2009 08:21 AM
Hello,
I'm trying to use the DDK to read and write to the Registers of the running VI on the FPGA (7831R+7833R). So I downloaded the examples for the R-Series. It still reads 0xffff but i don't now why....?!
I'm using the VISA OsiBus and the 7831R Layer.
I hope someone could help me!
Thx!
Here's the Code:
#include "osiBus.h"
#include "stdio.h"
#include "t7831R.h"
#include "windows.h"
void example(iBus *bus);
void initMite(iBus *bus);
int main(){
iBus* bus;
bus = acquireBoard("RIO::INSTR");if(bus == NULL){printf(
"Error accessing the PCI device. Exiting.\n"); return 1;}
initMite(bus);
example(bus);
releaseBoard(bus);
return 0;}
void initMite(iBus *bus){
u32 value, value2;
tAddressSpace Bar0;
u32 physicalBar1;
Bar0 = bus->createAddressSpace(kPCI_BAR0);
physicalBar1 = bus->get(kBusAddressPhysical,kPCI_BAR1);
printf ("BAR1: %x\r\n", physicalBar1);
Bar0.write32(0x10, 0x41550000);
Bar0.write32(0x8, 0x0);
value2 = Bar0.read32(0xC4);
Bar0.write32(0xF0, 0x0);
Bar0.write32(0xF4, 0x0);
value = Bar0.read32(0xF4);
Bar0.write32(0xC0, (physicalBar1 & 0xffffff00L) | 0x80);
Bar0.write32(0xC4, (physicalBar1 & 0xffffff00L) | 0x808E);
// IOPCR
Bar0.write32(0x470, 0x800372);
Bar0.write32(0x24, 0x77908894);
//
Bar0.write32(0xF4, 0x0);
bus->destroyAddressSpace(Bar0);
}
void example(iBus *bus)
{
tAddressSpace Bar1;
t7831R *board;
int i = 0;short sum;
short Reset = 1;short Restart = 1;
short EnableIn, EnableOut;
Bar1 = bus->createAddressSpace(kPCI_BAR1);
board = new t7831R(Bar1); printf ("bus: %x\r\n", *bus);//printf ("BAR1: %i/r/n", (int)Bar1);
printf ("board: %x\r\n\r\n", (int)board);
if (Reset == 1)// Reset of the FPGA
{
printf ("Resetting board...\r\n");board->CommandRegister.writeReset(1);
board->CommandRegister.writeReset(0);
Sleep(10); // wait 10 ms
board->CommandRegister.writeEnableClear(1);
board->CommandRegister.writeEnableClear(0);
}
// Check for necessary restart
EnableOut = board->CommandRegister.readEnableOut();
EnableIn = board->CommandRegister.readEnableIn();
if (!((EnableIn == 1) && (EnableOut == 0)) && (Restart == 1)){
printf ("Restarting FPGA VI...\r\n\r\n");board->CommandRegister.writeEnableClear(1);
board->CommandRegister.writeEnableClear(0);
// Set initial control values here if necessary
// Start
board->CommandRegister.writeEnableIn(1);
}
// Read 32-bit value, 1st register
i = board->IO32bit_1.readIO32bit_1Data();
printf ("index: %i\r\n", i);
// Write 16-bit value, 2nd and 3rd register
board->IO16bit_2.writeIO16bit_2Data(5);
board->IO16bit_3.writeIO16bit_3Data(4);
Sleep (500); // Wait at least 100 ms to calculate sum and update index
// Read 16-bit value, 4th register
sum = board->IO16bit_4.readIO16bit_4Data();
printf ("Sum: %i\r\n\r\n", sum);// Read/write 16-bit value directly from register (upper 2 byte of each)
Bar1.write16(0x810A, 40);
Bar1.write16(0x810E, 50);
Sleep (500); // Wait at least 100 ms to calculate sum and update index
sum = Bar1.read16(0x8112);
printf ("Sum: %i\r\n", sum);// Read 32 bit value directly from register (all 4 bytes of the 1st register)
i = Bar1.read32(0x8104);
printf ("index: %i\r\n", i);scanf("\r\n");
delete board;
bus->destroyAddressSpace(Bar1);
}
Solved! Go to Solution.
11-04-2009 09:14 AM
Joe Friedchicken
NI Configuration Based Software Get with your fellow OS users
[ Linux ]Principal Software Engineer :: Configuration Based Software
Senior Software Engineer :: Multifunction Instruments Applications Group (until May 2018)
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)
11-04-2009 09:36 AM
Hello Joe,
yes they all comes with 0xffff back. But i found the problem. The System handles the bits after the BigEndian format, so i also marked it in the ositypes.h
And this makes the error. IT MUST BE set to LittleEndian, base from which ever. I think this is a bug.
Thanks for your reply
11-11-2009 07:04 PM
Hi
We use VISA based Register level programming for E Series DIO channels for one specific purpose. We access only the following DAQ-STC Registers
DIO_Control_Register
DIO_Output_Register
DIO_Parallel_Input_Register
Window_Address_Register
Window_Data_Read_Register
Window_Data_Write_Register
The E Series RLP manual provides their address and offset correctly. We want to use the M Series Board and I am unable to find the DAQ-STCII RLP details. I tried the entire NI Site. Please provide the STC II registermap or atleast the register information of the above registers.
thanks and regards
Sathish
11-12-2009
10:44 AM
- last edited on
06-11-2026
08:43 AM
by
Content Cleaner
Hi Sathish,
Given how much blatant, undisclosed, and unrepentant cross-posting [1] [2] [3] [4] [5] you've done to ask this question, I gave you the benefit of the doubt that you were new to the NI forums and didn't understand the etiquette of this community. However, looking at your profile, you've been around just over 8 years! How can you be so selfishly impolite?
To your credit, you at least searched the forums to find (somewhat) relevant to which topics to reply, but as you said you 'tried the entire NI Site', I'm surprised that you missed the DDK home page [6] that has a link to the M Series register map.
[1] Re: m series register programming in straight C
https://forums.ni.com/t5/Driver-Development-Kit-DDK/m-series-register-programming-in-straight-C/m-p/...
[2] Re: Problems configuring a port in niPXI-6509 card as input port using static DIO Register Level Programmer maual
https://forums.ni.com/t5/Driver-Development-Kit-DDK/Problems-configuring-a-port-in-niPXI-6509-card-a...
[3] Re: Problem with writing to registers
https://forums.ni.com/t5/Driver-Development-Kit-DDK/Problem-with-writing-to-registers/m-p/1021120#M1...
[4] Re: Is there a Register Level Programming manual for NI 625x PXI
https://forums.ni.com/t5/PXI/Is-there-a-Register-Level-Programming-manual-for-NI-625x-PXI/m-p/102112...
[5] Re: Where Can I find information about register level programming the PXI 6259?
https://forums.ni.com/t5/Multifunction-DAQ/Where-Can-I-find-information-about-register-level-program...
[6] Register Level Programming for OEM Customers
http://digital.ni.com/express.nsf/bycode/exyv4w?opendocument
Joe Friedchicken
NI Configuration Based Software Get with your fellow OS users
[ Linux ]Principal Software Engineer :: Configuration Based Software
Senior Software Engineer :: Multifunction Instruments Applications Group (until May 2018)
Software Engineer :: Measurements RLP Group (until Mar 2014)
Applications Engineer :: High Speed Product Group (until Sep 2008)
12-03-2021 09:48 PM
where can i find pacekage included rio_ex1.cpp? please