I am having difficulty getting a 6601 card to generate a variable duty cycle PWM under QNX6.3.0sp2. It works fine when I reset the TIO chip and program all the registers. Unfortunately that gives a glitch when changing duty cycles. I am trying the bank switch feature to eliminate the glitch. The sequence I am using is: 1) program all the registers for the inital PWM and enable software bank switching, 2) load registers A and B and trigger the bank switch. The problem I am having is the second step is giving a PWM with a mix of values from both steps. For example, step1 initial PWM of 100Hz 40% duty cycle sets A=80000 B=120000. I see the correct output. Step2, change to 100Hz 80% duty cycle (A=160000 B=40000) gives me 166.7Hz 66.7% which is A=80000 B=40000 (A from step1 and B from step2). Here is a code segment.
Step 1 (initial setup with 😞
board->G01_Joint_Reset_Register.writeG0_Reset(1);
board->G0_Command_Register.writeG0_Write_Switch(0); // write to A only for initial time
board->G0_Command_Register.writeG0_Bank_Switch_Mode(1); // software bank switch
board->G0_Command_Register.writeG0_Bank_Switch_Enable(0); // disable bank switch, write to bank X
board->G0_Load_A_Registers.writeG0_Load_A(load_A); //A is the high count
board->G0_Load_B_Registers.writeG0_Load_B(load_B); //B is the low count
board->G0_Command_Register.writeG0_Load(1);
board->G0_Mode_Register.writeG0_Reload_Source_Switching(1); //reload from the other load register on each terminal count
board->G0_Mode_Register.writeG0_Loading_On_TC(1);
board->G0_Input_Select_Register.writeG0_Source_Select(30); //set source to internal timebase 3, the 20MHz internal clock (80MHz on 6602)
board->G0_Input_Select_Register.writeG0_Gate_Select(30); //set gate to disabled gating
board->G0_Mode_Register.writeG0_Gate_Polarity(1);
board->G0_Command_Register.writeG0_Synchronized_Gate(1);
board->G0_Mode_Register.writeG0_Trigger_Mode_For_Edge_Gate(3);
board->G0_Mode_Register.writeG0_Gating_Mode(1);
board->G0_Command_Register.writeG0_Up_Down(0); //set counting direction to down
board->IO_Pin_36_37_Configuration_Register.writeIO_Pin_36_Select(1); //set PFI line to output
board->G0_Mode_Register.writeG0_Output_Mode(10);
board->G0_Command_Register.writeG0_Write_Switch(1); // write to inactive register set
board->G0_Command_Register.writeG0_Arm(1); //arm counter
board->G0_Command_Register.writeG0_Bank_Switch_Enable(1); // enable bank switch
Step 2 (subsequent calls):
board->G0_Load_A_Registers.writeG0_Load_A(load_A);
board->G0_Load_B_Registers.writeG0_Load_B(load_B);
board->G0_Command_Register.writeG0_Bank_Switch_Start(1); // swap banks
Any ideas?
Doug
