Hey Jeff,
Thanks for sharing the diagram with us. I think I understand this much better now. The pinouts for the front-end connector do have separate paths for each Lo but the 414x SMUs have these all these connected together internally. The Sense LO leads however are separated out per channel allowing for differential measurement remotely thru the sense leads.
Regarding the voltage drop when using the SMU, there are a combination of factors (some already discussed) that will affect how much voltage drop will be seen in the system overall, including:
1. Thermal EMF
The thermal EMF for the 2530 is spec'd at < 50 uV in 1-wire mode, however this should be less in 2-wire mode as the much of the EMF from one wire is cancelled out by the other wire. Did you have a chance to look at the thermal EMFs in the matrix configuration yet? I would expect this to be much smaller than 50 uV but if you have some measurements, please feel free to share them with us.
2. I*R drops in cabling and switches
The resistance from channel to column is spec'd at <2 ohms. Since the SMU would be taking up two columns, I would double the resistance to 4 and then conservatively estimate the total wire resistance to be 6 ohms, giving us a total of 10 ohms, conservatively. At 10 uA, we have the potential of 100 uV of voltage drop.
3. Offset output/measurement accuracy of SMU itself
For the 4141, this is spec'd at +/- 600 uV when self-cal has been performed in the last 24 hours, and the temperature hasn't changed more than +/- 5 C from self-cal; the 4140 is spec'd at +/- 5 mV when using the same time and temperature conditions. The 4141 only, has a +/- 1 degree spec of +/-150 uV, which is the offset accuracy I mentioned in my previous post. You can look at the section titled, Voltage Programming and Measurements Accuracy/Resolution in the spec for more information there.
4, SMU voltage load regulation
Voltage load regulation tells us how much the output voltage will change based on the output current of the SMU when in local sense. The spec for the 4140/4141 is 10 uV per mA of output current, so therefore, this is negligible when we're talking 10 uA or less (< ~100 nV)
Based on these numbers I provided above, we're looking at a conservative estimated system burden voltage upward of +/-300uV for the 4141 and +/- 5.15 mV for the 4140 when sourcing 10 uA. I'd expect these numbers to be much less but this is just a first-pass estimate.
Keep in mind that the offset voltage (#3) will be the smallest right after performing self-cal, so a smaller offset error can be assumed if performing self-cal more frequently than 24 hours.
To reduce the voltage drop created by #2 and #4, you can use remote sense to compensate out the voltage drop in your wires, switches and the resistance internal to the SMU itself. This of course would require 2 extra columns and 2x number of rows to route the extra signal paths. What is the expected voltage across your DUT? Sometimes it's useful to look at the ratio of the burden voltage to the DUT voltage so see how great of an impact the burden voltage will have on the overall performance.
Do you have a target for the overall burden voltage you would like to hit? Is 300 uV or 5.15 mV too large for your application? Generally, burden voltages on DMMs will be on the order of 100 mV to 1 V, so an SMU will definitely give you an advantage in that regard. Also, another feature on the 4141 only that may be useful for your application, is that you can have a programmable output resistance. I'm not sure if this would work for your application, but I saw that you were using dummy resistors to simulate the shunt and the 4141 may be able to simplify this for you. Perhaps you could cut your column count in half by reprogramming the output resistance from 0 ohms to x ohms? Just a thought but, wanted to share with you just in case.
Let us know what you find and we'd be happy to help.
Thanks!
Brandon G
National Instruments
Precision DC Hardware Engineer