Slow counting(PCI-6601)

[Ana P]

Hi yatintyagi,

Thanks for explaining what you want to accomplish, I understand better now. You can accomplish the first task without problems, but not the second task. With this card you cannot output the onboard clock in one of the counters and read it in another counter. I understand that with the 6602 you can do that, because that card has an 80 MHz timebase, so you can output a 20 MHz in one counter. If you have a 6602 card available, you might want to try using that. I hope this helps,

[yatintyagi]

Hi,

1.     So suppose I use the vi attached (it is a modified version of the buffered counting vi) in which the timeout is 0, would the no. of loops increment represent the no. of pulsesof the sample clock? If not what does it represent.

2.    And about implementing a real time clock I read this article link http://digital.ni.com/public.nsf/allkb/E4445C0FA42B75A28625689E00675AEA?OpenDocument in one of the forums which says the PCI 6601 can be used to make a real time clock, but it doesn't have the vi or any diagram of the vi.

So, can I use this to do the previous mentioned thing.

Thanks,
Yatin

[Brooks_C]

Hello Yatin,

In your example program each loop iteration means that you read in 5 samples from your counter input buffer.  Since you've specified an external sample clock (I believe you said it was 100 Hz), then you're doing a buffered acquisition.  That means that each rising edge of the sample clock you will latch the current counter value.  The counter value depends on how many rising edges the counter has counted and not this clock.  I.e. if you count rising edges of a 1 kHz signal and use a sample clock of 100 Hz you would expect to latch values of 0, 10, 20, 30... and so on.  The DAQmx read timeout is how long that VI will wait for the specified number of samples to be in the buffer before it errors out--it doesn't affect the sample acquisition or collection.  The only think you can use the number of loops to infer is the number of samples you read from the buffer.  This number will likely be close to 1/5 the number of sample clock rising edges, however, if you're not emptying the buffer there may be a few samples still in the buffer when you stop the loop.

With regards to your second question, Ana is correct that the maximum counter output frequency you can generate with the PCI-6601 is 5 MHz.  However, you can count edges on the 20MHz timebase if you use a DAQmx Connect/Disconnect Terminals VI to route the timebase to a PFI line.  Once you route the timebase to a PFI line you can use a wire externally to connect this PFI line with the counter input.  In order to see a list of available PFI lines to route the timebase you can open up the Measurement and Automation Explorer (MAX).  Left click on your device and then in the bottom middle of MAX you should see a device routes tab that shows all available routes.  One thing to remember is that you should disconnect the connection you make using the DAQmx Disconnect Terminals VI after your done, otherwise these terminals will stay connected until you disconnect them or reset the card.

I hope this helps and have a great day!

[yatintyagi]

Hey,

Thanks Brooks and Ana for all the help .. I guess I have all the info i needed.. If I have any further queries I'll get back ..

Thanks again..
Yatin