07-26-2015 01:14 AM
Hello all,
I have a recent project that involves simultaneous generation of waveforms across multiple NI-5411s (PCI version). These 5411s will generate a set of waveforms continuously until the user stops the program.
My initial idea was to have one of the 5411 as a "master" device, which will output a start trigger pulse to the other three "slave" 5411s. The implementation will be similar to this example program here.
As I was looking around for alternative implementation / additional information, I found one possible alternative, where the "master" 5411 will send a SYNC pulse (not a start trigger) to the "slave" 5411s via RTSI, by using the "niFgen Export Signal" VI. Of interest is the option to output a "Synchronization Pulse" that promises "absolute synchronization between two or more signal generators (5404/5411/5431 only)." The "slave" 5411s will call the "niFgen Configure Synchronization" VI to read in the synchronization pulse. However, I am not able to find any related example programs in LabVIEW or on the NI website.
My questions are:
1) What is the difference between using a start trigger and using the "synchronization pulse"?
2) Are there any examples that demonstrate the use of this "synchronization pulse" to synchronize the generation of multiple 5411s?
3) Is there a benchmark that shows how tight the synchronization is for this "synchronization pulse", say versus a normal start trigger?
Thanks in advance!
Best regards,
Victor
07-27-2015 09:52 AM
Hi Victor:
I'm not an expert on the FGEN products, but I know a lot about synchronization. Hopefully my answer will help.
When you send a start trigger across RTSI to multiple devices, there is a small amount of propagation delay from one device to the next. (I would guess this delay is probably on the order of a few nanoseconds.) That propagation delay can cause your devices to start generating at slightly different times; slaves which are closer to the master will start slightly earlier than slaves farther away.
Using a synchronization pulse can eliminate the effect of the propagation delay. To use a sync pulse, the master must first share a clock signal with the slaves, and each slave PLLs a local oscillator to that signal. Then, when the master sends the synchronization pulse, the slaves do not start immediately on that pulse. Instead, they wait until the next rising edge of the local oscillator (which is phase locked with the master). It is okay if the sync pulse arrives at each device at a different time; as long as it can reach all devices in less than one period of the clock, they will all start at the same time. With a 20 MHz clock, the sync pulse would have 50 ns to propagate to each device.
Three links I found that may help you:
Using the 5411's Trigger Lines - http://zone.ni.com/reference/en-XX/help/370524R-01/siggenhelp/ni_5411_31_rtsi_pxi_trigger_lines_1/
Phase-locking masters and slaves - http://zone.ni.com/reference/en-XX/help/370524R-01/siggenhelp/master_slave_operation/
Possible example code? or at least a pointer to the shipping example - https://decibel.ni.com/content/docs/DOC-8281
08-07-2015 11:12 AM
Hello James,
Sorry for the late reply, and thanks for the detailed explanation on the synchronization pulse.
I have just one more question about the configuration - does this mean that instead of exporting the normal start trigger from the master, we export the synchronization pulse instead, and tell the slaves to use this as the substitute start trigger?
1) Configure 20MHz local clock from master to be shared with slaves for PLL.
2) Configure synchronization pulse to be shared from master to slaves on RTSI0 (for example)
3) Configure start trigger for all slaves on their RTSI0.
4) Start generation.
Best regards,
Victor
08-10-2015 05:01 PM
Hi Victor
I think you are on the right track:
I have just one more question about the configuration - does this mean that instead of exporting the normal start trigger from the master, we export the synchronization pulse instead, and tell the slaves to use this as the substitute start trigger?
1) Configure 20MHz local clock from master to be shared with slaves for PLL.
2) Configure synchronization pulse to be shared from master to slaves on RTSI0 (for example)
3) Configure start trigger for all slaves on their RTSI0.
4) Start generation.
If you look at the section that begins with "To phase lock NI PXI-5411/5431 signal generators, complete the following steps" on the instructions that James provided here: http://zone.ni.com/reference/en-XX/help/370524R-01/siggenhelp/master_slave_operation/, it is pretty much as you are describing above except with PXI devices.
We should be able to do the same with PCI devices as follows:
Keep in mind that the 5411 was End-of-Lifed around 2008 and is based on our older software architecture known as TDAQ, so there is not that much example code floating around anymore (if there were even any to begin with).
Jason L.
08-28-2015 11:06 AM
Hi Jason,
Thank you for your reply. I have been doing some tests with the information, and like what you mentioned, example codes are rare. However, I just like to share that one example resides in \instr.lib\niFgen\niFgenObsolete_2_2.llb, called "niFgen APP Synchronization". It shows how to configure the synchronization pulse for multiple FGENs, and I have been using this as a starting point.
While testing though, I had encountered two issues though, which I hope to get your advice on:
1) Channel Delay property
I was trying to call the "Output: Channel Delay" Fgen property on one of the 5411s, and an error was thrown "-1074130528 : Attribute ID not recognized" (please see Clipboard02.jpg). Is this property supported on the 5411? I have looked at the FGEN help file, and searched online a bit, but was not able to find any information.
2) Synchronization Pulse propagation delay and FGEN response time
In my test, I used two PCI-5411s (one master and one slave) and synchronized their outputs using the Synchronization Pulse method. In addition, I wanted to use a PCI-5112 to acquire the data from the two FGENs, and thus shared the 5112's 10MHz clock to the two 5411s for PLL. Both FGENs output the same waveform (a square wave), and I configured a marker on the master 5411 to trigger the 5112.
In the graph results, there was a phase difference of 25-100ns between the master's waveform and the slave's waveform. The attached images (Clipboard03.jpg and Clipboard04.jpg) shows an example for 25ns and 50ns lag. The 5112 was sampling at 40MS/s, so the spacing between two samples is 25ns.
From Jame's previous reply (see above), a 20MHz reference clock allows the sync pulse to have 50ns to propagate from the master to each slave. If I am using the 10MHz reference clock on the 5112, does this mean that the propagation time is now 100ns instead?
If so, this may help explain what I have seen. But is there a reason why the phase difference fluctuates? E.g. if I run the test 10 times, probably half the time this phase difference will be 50ns or less, while the other half will be 100ns. Does the response time of the FGEN in response to the marker trigger have any significant impact as well?
Best regards,
Victor
09-03-2015 10:44 AM
Hi Victor,
I’ve been searching through documentation and I cannot find any mention of a Channel Delay for the NI 5411. Considering the error that you have been seeing, this is most likely not an available function of this device.
Yes, by using a 10 MHz reference clock, there is a 100 ns window for propagation delay. Are the cables from the 5411s to the 5112 length matched? A difference in cable length could explain why these signals are so out of phase.