FPFA Reset

[bartekluk]

Hi

When I invoke FPGA reset method on my host computer the NI9401 module sets its outputs first to high state and then to low state after 104 ms. The problem is that setting it to high causes the machinery connected to my RIO to operate and that is what I do not want to happen.

Is there a way to use a reset method or something similar without having this effect on my NI9401 output. I want to reset it back to its defaults.

I suspect I could inititialise everything in the FPGA vi but will it not use up unecessariliy FPGA resources?

Thanks for your help.

[Hooovahh]

To peroform a reinit of an FPGA, can'd you just close the reference you have an open a new one?  I ask this because I've never had a need to but I assume this will work because opening a new reference should put the LVBIT file down on the FPGA again and cause it to start over.  If you are doing this often I would suggest implementing your own reset (like you said taking resources) on the FPGA.  This is just more convieneint so when you want to reinit all you do is toggle a boolean, instead of closing and re-opening references.