trying to use NI-6251's DIO port as input and output.

[rjohnson]

I'm using a 6251 card with LabWindows/CVI on a WinXP machine.
 
My problem is reading an EEPROM -- unfortunately, both its Clock (output from 6251) and Data (input to 6251) lines are hardwired on the same physical channel (DIO Port1)

Is it possible to configure individual port lines, so that one line (say, Port1.6) is an Output, and another line (say, Port1.7) is an Input?

I would like to not have to keep starting and stoping the tasks on the whole port at one time ,,,  but just leave each separate line running as a read or write until the operation is completed.

I'm beginning to think this is not possible.

as it is now, i have to start a write task, toggle the clock, stop the task, start a read task, read the data bit, stop the read task, start the write task and toggle the clock.... all this for just one bit.  

as you can imagine, the whole operation is rather slow:   im only getting a read throughput of about 100 bytes per second.     for an EEPROM that is capbable of delivering around 40,000 bytes per second.  

if i didnt have to keep starting and stopping the clock's write task, i could probably get about 1000 bytes per second, and then I'd  be quite happy.

any suggestions?

thanks!

[Kevin_Price]

I've used the 6259 to do something similar so I'd expect the 6251 would also be capable.  In my app, I had a counter generating a 10 kHz "sampling clock".  I configured a hw-timed output task to generate several output bits on the leading edge and configured a hw-timed input task to acquire several input bits on the trailing edge.  It worked out just fine.

Trouble is, I used LabVIEW and can't give you any syntax suggestions for LabWindows/CVI.  The main thing I can think of is that when I was configuring the virtual channel, the string looked like:

Output: "Dev0/port0/line0:7"

Input: "Dev0/port0/line8:31"

The key (for me) was to designate the range of individual lines within the digital port and not just setup "Dev0/port0" which implies ALL lines at once.  Maybe this helps?  In any event, I DO think the board can do what you want if you can find someone to show you how to do it with CVI.

-Kevin P.

[rjohnson]

thanks for the reply, Kevin

i'll try to work in your suggestions using CVI.  

maybe it's just a case of me missing something simple.

[TheWoost]

Hi rjohnson,

One way that you could approach this is to create your output clock from a pulse train generation counter output task (if you have an available counter) and export the counter output event to PFI6 (P1.6).  You could then set up a digital input task that runs continuously on PFI7 (P1.7) to receive any digital data that is being transmitted by your EEPROM.  Because both the counter task and the digital input task are started only once, this should provide a much faster and more efficient solution.

Regards,
Andrew W
National Instruments

[rjohnson]

thanks Andrew.   that sounds like it might work.   what do you mean by exporting the counter?

[TheWoost]

rjohnson,

You can route signals internally using the DAQmxExportSignal function.  In your case the DAQmx_Val_CounterOutputEvent would be the signal routed to PFI6.

Regards,
Andrew W

[rjohnson]

oh, cool.   that looks like a good thing to put in my bag o' tricks.   i'll give it a shot.

[Erik_J]

I posted a CVI example that uses port1, line6 as a digital output and port1, line7 as a digital input.  You do not have to restart any tasks to do this, just create one digital input task and one digital output task.  Note that while this is possible on the PCI-6251, it is not possible on all devices.  Some devices require all lines on a single port to be configured as all inputs or all outputs.

That post can be found here.

Regards,

Erik

[Kevin_Price]

Erik,

Are you sure?  Does your example use hw-clocking for the DIO?  Doesn't hw-timed DIO need to be on Port 0 rather than on Port 1?  And isn't it the case that the Port 0 bits that can be hw-clocked cannot be routed as PFI signals?

(Ok, I just reviewed the beginning of the thread and the original poster started on Port 1 and didn't explicitly talk about hw-timing.  I think I just assumed hw-timing when he referred to 40000 bytes/sec.  I also assumed the need for buffered acquisition rather than software polling for the sake of data integrity.)

So...   I would very much recommended moving over to Port 0 and using the "correlated DIO" capabilities of the M-series board.  It kinda sounds like this could be done using a simple counter pulsetrain as the CLOCK output and a single hw-timed DI task for the DATA input.  The same counter used as the CLOCK output could be used as the sampling clock for the DI task, though I'd recommend using the active CLOCK edge as the leading edge of the pulsetrain and perform the DI sampling on the trailing edge of the same pulsetrain.

-Kevin P.

[rjohnson]

Erik, thanks for the example, i got it to work just fine.   its similar to what i wound up doing, that (as Kevin noted earlier) i needed to separate the lines when configuring the channel.   i had been doing everything prior on a whole-port basis.   I like the example using the IOCtrl instrument file, that was good for me to see.

and yeah, 40000 Bps is about the extreme max, and would need hardware timing.   Which is not what I'm doing.    The way it's working now, its running about 800-1000 Bps, which is sufficient. for my needs.   Much better than when I first started hacking at this, where i was getting about 20 Bps.

rob