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LabVIEW FPGA with Basic TX and Basic RX Daughterboards and the USRP X310

Below are instructions for how to modify the Simple NI-USRP Streaming LabVIEW FPGA sample project to run with a Basic TX and Basic RX daughterboard installed.  A modified sample project is also attached.


Front panel.png

Hardware setup:

Basic TX and Basic RX installed on RF 1 (could be RF 0, chose side 1 arbitrarily)

Cabled TX SMAs to RX SMAs (Optional)


USRP front.png

        IMG_20141103_120438148_HDR small.png

Software:

  1. Create sample project.
  2. Open Full Duplex Streaming (Host).vi and go to the block diagram.
  3. Change Configure Signal.vi from Level to Gain.  Do this for both instances of the VI in Full Duplex Streaming (Host).vi:


Configure Signal.png

  1. Open Configure Signal (Gain).vi
  2. Set Correct Impairments? to False.  Right click, go to Data Operations, and select Make Current Value Default.

Correct Imparements.png

  1. Go to the block diagram, then find and open Configure Signal (Common).vi
  2. Set Wait for lo to lock input on Configure Frequency.vi to False

Wait for lock.png

  1. Open Configure Frequency.vi and go to the block diagram.
  2. Placed disable diagram around Configure LO.vi

Disable.png 

Enabled.png

  1. Break out the received spectrum into it’s real (I) and imaginary parts (Q).  Change the FFT so that there are 2 separate FFTs to capture both I and Q.

Power spectrum.png

  1. On the Full Duplex Streaming (Host).vi front panel, set the Rx Channel and Tx Channel to match the slot where the Basic daughterboards are installed.  In this example, channel 1/B was used so the channels on the front panel are set to rx/RF 1 and tx/RF 1.

Note:  The values on the front panel for Frequency, LO Frequency, Reference Level, and Output Power do not function because there is no hardware equivalent for these settings on the Basic daughterboards.


Sarah Yost
Senior Product Marketing Manager
Comments
apchar_
Member
Member
on

Thanks for the post Sarah. Always good to see more X310 examples. There was one more change that has to be made. I had to disable the error checking in "Decode Daughterboard Names.vi" in "niUsrpRio Config v1 Host.lvlib". That vi only has the code for wbx, sbx, or cbx boards. The library has to be unlocked first.

Lisen08
Member
Member
on

Hi,

Good example! 

My understanding is that an arbitrary wave, for instance waveform of center frequency lower than 1MHz, can be produced in this way just like an Arbitrary Waveform Generator. Is it Right?

Can this way be utilized to USRP RIO? My working platform is USRP 2943R.

Thank you.

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