cRIO Precision Time Protocol

[viScience]

Is it possible for the cRIO to run the IEEE 1588 or Precision Time Protocol. I would like to be able to sync 12 cRIO's to GPS time so that all cRIO NSV timestamps will be based on the same absolute time within 1ms.

[Adam_U]

Out of curiosity, what cRIO chassis/controllers will you be using? How will GPS time map to 1588 time in your system. And lastly, how do you plan on using 1588 time (for I/O? RT Software sync?). This sounds like an interesting use case.

Thanks,

-Adam

[viScience]

Hi Adam, I will be using 12 cRIO9014. They all need to be GPS sync'd and will generate SNV data to a control room PC using the DSC to log data to Citadel. The database timestamp must correlate to 1ms with data generated by other 3rd party GPS sync'd systems. This project is for NASA and will be used to provide Launch Vehicle suspension for dynamic structural testing. I am not sure what brand of GPS equipment I will be ordering. We can get anything from a PXI solution to any sort of rack mount system. I was hoping that the cRIO group would offer a PTP stack interface so that any networked GPS receiver could sync all the cRIO's via a single network hub. Thanks for your help, Mike Sachs Intelligent Systems www.viScience.com Onsite at the Marshall Space Flight Center

[Aashish_M]

Hey Sachsm,

This is definitely a very interesting application.

I think a great resource for you will be Synchronizing Multiple CompactRIO Chassis.

I believe the Clock Synchronization section is very interesting.

Hopefully this helps!!

[viScience]

Thanks for your response but my cRIO's are 100's of meters apart and will not be able to share a distributed clock. I am still hoping to hear from someone in the LVRT group about plans to incorporate PTP into the cRIO.

[Christian_L]

Currently there is no 1588 support for cRIO, but it is being investigated.

The current options for this functionality include SNTP and DTB.

Client SNTP

Set System Time with Sub-Second Accuracy (VxWorks)

PXI TIME SETTING

Distributed Timebase (DTB) Component

[MathBoda]

You can use the PPS form a GPS module not with the SMB but as FPGA Digital input (cRIO-9401 is 100 ns accurate) to synchronise all FPGA acquisition with the PPS.

The FPGA code record the delay between the PPS and the first measurement (after the PPS) of any analog or digital modules.

By recording the GPS raw data in the RS232 RT input, you can know the time of the PPS then get a synchronised acquisition system within less than 1 ms.

Regards,

Mathieu

[Adam_U]

I'd like to announce that the NI Timing and Synchronization group is currently working on a software synchronization pioneer program which will support IEEE-1588v2. We are planning on supporting the following platforms in Q4 of this year (2008):

cRIO

• 9012, 9014
• 9072, 9073, 9074 

cFP

• 2200, 2210, 2220

Vision

• Smart Camera series

This will be a downloadable, software-based implementation of the IEEE-1588 v2 (2008) protocol. You will be able to use the 8.6 LabVIEW RT timed loop to execute events at a synchronized absolute time between multiple RT targets. If you have a GPS receiver that provides 1588 v2 time as a grandmaster, your software would be synchronized through IEEE-1588 v2 to GPS time.

To note, the PXI-6682 and PCI-1588 family of products will have Beta NI-Sync 3.1 software available around the same timeframe to support 1588 v2 and interoperate. In fact, the PXI-6682 could receive GPS or IRIG time and master the network for this implementation.

I will post to this forum as more information is available. 

Please let me know if you have any additional questions  

swsync.beta@ni.com 

[viScience]

Will Shared Variable and IO variable timestamps automatically be sync'd to GPS time using the software synchronization tools?

[Vahan]

I'm currently trying perform a similar synchronization task with two stand-alone cRIO systems using SEA GPS+ modules. The GPS+ modules are installed in slot 1 of both cRIO chassis and rest of the slots are populated with 24-bit DSA modules. I'm also using SEA GPS Synch Driver on FPGA to generate an absolute time stamp for each data point collected.