Example Code: Getting Started with the NI Single-Board RIO General Purpose Inverter Controller (GPIC)

[diegopereze]

What type of distortion does the waveform have: clipping, non uniform spacing between samples,...?

The sbRIO 9606 does not have any ADCs, therefore it cannot acquire analog waveforms, I assume you are using an interface board such as the GPIC 9683. This board has configurable input range: +-5V or +-10V; and configurable output data type: raw (just a binary number of 12bits) or scaled (the voltage express in fixed point).

I would recommend checking these two aspects first.

[yaasir]

Yes you are right. i am using GPIC 9683. i used the input pin simultaneousAI0 and then display the waveform on a host vi. but the waveform was distorted and almost ressembles a triangular waveform. Can you please upload a program for me to input a sine wave and then display it on a host vi so that i can compare with mine.

[yaasir]

Date: Tue, 15 Mar 2016 07:35:27 -0500

From: web.community@ni.com

To: yaasir2792@hotmail.com

Subject: Re: - Example Code: Getting Started with the NI Single-Board RIO General Purpose Inverter Controller (GPIC)

NI Community

Example Code: Getting Started with the NI Single-Board RIO General Purpose Inverter Controller (GPIC)

new comment by diegopereze View all comments on this document

What type of distortion does the waveform have: clipping, non uniform spacing between samples,...?

The sbRIO 9606 does not have any ADCs, therefore it cannot acquire analog waveforms, I assume you are using an interface board such as the GPIC 9683. This board has configurable input range: +-5V or +-10V; and configurable output data type: raw (just a binary number of 12bits) or scaled (the voltage express in fixed point).

I would recommend checking these two aspects first.

Reply to this email to respond to diegopereze's comment.

[diegopereze]

I would say that your problem is caused by data loss.

The data transfer mechanism that you use to transfer data from the FPGA VI where the acquistion is performed to the HOST VI should ensure a lossless data transfer in order to see the waveform properly.

Since FPGA can sample at fast rates (~100kSamples/s), this data should be streamed using a lossless data mechanism [dma fifos, network streams, front panel control + sincronization mechanism (interrupts, polling of a flag)].

The simplest option would be to simply use a "front-panel indicator" in the FPGA VI. This would handle all the details explained above.

[yaasir]

Thank you for your help. Can i store the data from the FPGA on an array and then use it in the host vi to display the waveform.

Date: Tue, 15 Mar 2016 10:00:01 -0500

From: web.community@ni.com

To: yaasir2792@hotmail.com

Subject: Re: - Example Code: Getting Started with the NI Single-Board RIO General Purpose Inverter Controller (GPIC)

NI Community

Example Code: Getting Started with the NI Single-Board RIO General Purpose Inverter Controller (GPIC)

new comment by diegopereze View all comments on this document

I would say that your problem is caused by data loss.

The data transfer mechanism that you use to transfer data from the FPGA VI where the acquistion is performed to the HOST VI should ensure a lossless data transfer in order to see the waveform properly.

Since FPGA can sample at fast rates (~100kSamples/s), this data should be streamed using a lossless data mechanism .

The simplest option would be to simply use a "front-panel indicator" in the FPGA VI. This would handle all the details explained above.

https://decibel.ni.com/content/servlet/JiveServlet/downloadImage/105-48107-197280/310-260/sampling.jpg

Reply to this email to respond to diegopereze's comment.

[BMac]

Use the NI CompactRIO Waveform Reference Library to stream waveform data at high speed between the FPGA and processor. It uses Direct Memory Access (DMA) to transfer the data in the RAM of the processor, without taking much CPU resources.

Note that the GPIC Reference Design does not use the official NI CompactRIO Waveform API. It uses a customized local copy to avoid typedef problems associated with multiple FPGA/RT targets using the same type definitions. The customized versions uses different typedefs for each target to avoid these issues.

Also note that using a front panel chart indicator on the FPGA VI will not provide a lossless buffered streaming mechanism for waveforms. However, it does provide a lossless single-point interface. It can be read in a point-by-point fashion by the LabVIEW Real-Time application. However, this limits the update rate to about 3 kHz and it takes significant CPU resources. Using DMA is much more efficient for the processor application.

If very low latency communication between FPGA and the Real-Time OS is required, you may be interested in the new Host Memory Buffer for CompactRIO support. It is more complex to implement but very powerful for latency sensitive applications.

Host Memory Buffer for CompactRIO

BTW, the master library of power electronics control examples and IP cores has just been updated today. Among other things, this includes new IP cores for Proportional Resonant (PR) control with phase compensation and harmonic elimination. Follow the download link here:

Guide to Power Electronics Control Application Examples and IP Cores for NI GPIC

My colleague is working on new IP cores for power electronics applications that make it easy to drop in a single subVI to add DMA waveform capture into control applications with pre-trigger and post-trigger buffering. That way, if a fault or other event occurs that you want to trigger the capture, the data is captured at high speed before and after the triggger, and the RT application automatically updates and can log the data and/or send it over Ethernet. However, this code is still being developed and tested. We will share it as soon as it's ready for others to test it.