Discrete Transfer Function for MMC Control Using cRIO-9082

[SKaler93]

Hi,

Forgive me in advance if I break any discussion board etiquette, I don't post very often. I'll start by giving as much background as I can in order to make it easier on anyone that can help.

I am currently working on a modular multilevel converter (MMC) system. I have the constructed and tested the hardware setup, and am using a cRIO-9082 & NI9144, along with several C-Series modules in order to control the MMC. Now, the MMC works in simulation according to the theory that we are putting forth, and so I do have a bit of a guideline to follow.

Over the past week or so, I've been working on the closed loop control of the system. Initially, I was using the PID blocks built in to LabVIEW FPGA and using the appropriate proportional and integral gains, have been able to control the parameters that I am interested in. That is, I'm able to track step changes with no problem whatsoever. The problem arises when I try to take it one step further.

In the MMC system, there is an injected AC component which is used to control some components of the power inside the system. As such, my controller would need to be able to follow a sinusoidal reference. Now to do that, I've designed a controller based on classical control theory which again, works well in the simulations and gives me exactly the expected behavior at my frequency of interest (400Hz). But when trying to implement what is essentially a 4th order transfer function in the FPGA, I must use the discrete transfer function. However, when using the discrete transfer function VI directly with the numerator and denominator coefficients that I've calculated, I am finding that my system loses stability, and I have not yet introduced the AC component. I have also confirmed through other VIs that the order of the coefficients that I am entering is not the issue.

So as it stands, I have two VI's, one running on the cRIO's RT, and the other on the FPGA. The purpose of the RT is to do some measurements, simple calculations, conversions, send some signals to the boards I have in my system for proper startup sequences, and essentially communicate to the FPGA. In the FPGA VI, I have my control loop, PWM, and some measurements (due to a lack of space on the NI9144 chassis we are using).

What I expect my FPGA VI to do is to generate PWM signals (which it does using the PID block) however when I switch it to the transfer function that I have calculated (again, works in simulation, converted to discrete using MATLAB and confirmed with LabVIEW) I am not able to follow even a step input. Note that this FPGA VI has been designed for a simplified MMC. I am currently testing with only one submodule per arm as I would like to be gain confidence in my control algorithm before taking on the complete system.

What I would like to know is if there is something inherently wrong with the way I am implementing my transfer function. I realize that the VIs are a bit messy (combination of the fact that I'm fairly new to LabVIEW, and that I've been trying a whole bunch of different things), and that a lot of the functions that I am carrying out can probably be done much easier. I hope to address those problems a little later on once I have confidence in my program.

Any and all assistance would be greatly appreciated.

[KVK89]

Hello, Skaler93 welcome to Powerdev. I am probably newer to LabVIEW FPGA than yourself and my suggestion may not be of much use to you. nevertheless, I will give a try. The following would be my suggestions.
1. I see that you are using a fixed point discrete transfer function block, there are floating point SUBVI's provided by NI. check https://forums.ni.com/t5/Power-Electronics-Development/Guide-to-Power-Electronics-Control-Applicatio...
2. There are other options to implement the transfer functions utilizing the integrator block or state space solvers. The SUBVI's for both are available from the above link.

[SKaler93]

Hi KVK89,

Thanks for the reply. I really appreciate it.

1. I've downloaded the library from that link previously, but never used the floating point subVI's that were provided for this purpose, I'll try to give that a shot.

2. After having no success with the FXP transfer function block, I'm currently working on trying to implement it using a direct form with unit delay blocks, gain blocks, and summing blocks. In the initial simulation tests, it seems to be working, but so did the other method with the transfer function block. Will have to compile it to the FPGA and see how it goes.