Configurable computing machines based on FPGAs are touted as reusable, reconfigurable platforms for accelerated computing, but the time-consuming FPGA compilation process limits designer productivity. Discuss a novel approach using previously synthesized, placed, and routed circuits called “hard macros” that enable rapid design assembly. Learn how this approach shortens compilation time by 10 to 50 times over the conventional approach and find out how it could be applied to LabVIEW FPGA applications.
