Multisim and Ultiboard

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voltage-controlled capacitance

I think there is a problem with the way that the voltage-variable capacitance component is implemented in Multisim for transient analysis.  In a circuit with DC sources, a time-varying capacitance should induce a time-varying current flow.  From Q=CV, then I=dQ/dt=C dV/dt + V dC/dt.  I'm guessing the last term is not implemented in the code, as it should be.  This makes it impossible to analyze some of the new types of microgenerators that exploit variable-capacitance MEMS devices, for example. 
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Hi there,

 

Thank you very much for your feedback. We have identified this problem and are looking into a fix for this right now. In the mean time, I have created a heirarchical block (var_cap.ms10) which can be used to replace this component. The multiplier block along with the capacitor implements the d(CV)/dt functionality. You can use the heirarchical block in your schematic by using the Heirarchical Block from File item from your Place menu. A simple test bench is also attached to demonstrate the functionality.

 

Hope that helps. If you need any more assistance, please let us know.

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Yi
Software Developer
National Instruments - Electronics Workbench Group
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I wonder where the distortion (see file attached) is coming from ? Is this as it is supposed to be ?

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