Multisim and Ultiboard

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VIAs clearance

Hi!

How can I set the size of the VIAs spacing (clearance) of a NET before starting autotrace?

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Hi,
here are the links to a couple of documents that you might hopefully find useful.

NI Ultiboard Basics: PCB Layout Course
http://www.ni.com/white-paper/52160/en/

Best Practices in PCB Design: Finalizing for Fabrication in Ultiboard
http://www.ni.com/tutorial/8583/en/

(You are interested in Ultiboard, aren't you?)
Regards,
Alessia

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