In the attached picture, the net 'Vb' on the left of C8 is named 'Vb'. To the right of C8 it is net '13'. Consequently they are not connected on the PCB when they should be. How can this happen? There is no way I can see to catch this error! This is really bad.
This is what happened when I moved C8 a little to the left. How does this happen? The schematic was converted from V10.
Based on your description it seems that the wires were overlapping one another, making them appear connected, but they were actually connected or sharing the same net.
Normally you shouldn't be able to drag unconnected wires on top of each other like this, but you mentioned that this schematic was imported from version 10, so it may have been a problem that was later fixed.
Are you able to get your design to a point where a single net has multiple net names in Multisim 14?
If you are unable to share your entire design, perhaps you could share a design snippet just of the area that you already included in your screenshot.
The problem is as I showed in the 2 photos. Net 13 was a 'stub' with a connection dot but did not connect to net 'Vb' that had a right angle turn directly under the dot making it 'appear' they were connected. This is a design that was done 6 years ago and I had to make a small change to a completely unrelated part of the circuit. The original schematic and layout was done in V10. I opened the schematic in V14, it added all the 'on page' connectors. I made my change and forward annotated the design to the PCB layout and touched up the routing. There were part type changes so the footprints changed and they had to be replaced and part moved around to make room so the fact that it created two nets where there was once one was missed. DRC checks all passed. For whatever reason, when it was converted from V10 it disconnected the net where that connection dot was. I am scared to death this will happen again as I have dozens of designs in V10 that will need to go through this same exercise and I have no way to check for it.