generating digital pulse train using USB 6229

[Gops]

Hello,

I want to generate four pulse train using the DO lines of the USB 6229 card. I used the daq assistant to generate coninuous line output using an external clock, I choose that clock source as 100Khz time base.

This always generates a fixed frequecy of 50KHz, even when I vary the number of samples and the update rate.

Can you please suggest me some idea to generate a variable pulse train using USB6229 and how to control the frequency?

Regards

Gopal

[MissyS]

Hi Gopal,

The digital lines do not update until there is a rising edge of the clock. Since you are writing a high bit on one rising edge, then a low bit on the next, you will be dividing the clock by two. To get a 100 kHz digital output, you will have to use a 200 kHz clock as your clock source. You can divide your same source clock further with by modifying the value of samples that you output (such as writing two high samples then two low samples to get a divide down of 4). I hope this helps!

Regards,

[Gops]

Hi,

I have attached a VI to generate 50KHz pulse train using the PXI-6220 DIO lines. In daq assistant I have choosen the number os samples as 2 and update rate as 50KHz. But it gives a run time error, memory underflow.

Can you provide me a sample to generate a pulse train using the DIO lines with the time base available in the card it self?

Regards

Gopal

[David L.]

Hi Gops,

The error is being caused because the card is outputting your 2 samples before the buffer has more samples in it, and therefore it runs out of samples and gets a memory underflow. I would suggest looking at the example ‘Cont Write Dig Port-Ext Clk.vi’ (Help >> Find Examples… >> Hardware Input and Output >> Digital Generation ). Please note, you will need to change the DAQmx write to use waveforms instead of U32. This example writes the entire waveform to the buffer before starting generation, and then continuously repeats the waveform until the while loop finishes (I.E. – the stop button is pressed). If you would like to do correlated (clocked) DIO using the onboard clock, this requires an analog clock to be routed and used as the sample clock for the digital lines. Please see this DevZone Example.

[Gops]

Hi,

The DEVzone lonk is not working. Can you please send me an alternative link?

Regards

Gopal

[David L.]

Here is the DevZone link