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fpga buffered DO, AO and AI example code

I am a long time user of Labview and NI cards.  I am looking to use an FPGA PICe cared from NI (PCIe-7852R or PCIe-7851R) to mimic the things I have done in the past using ASIC-type NI cards (PCIe-6259 DO+AO+AI, 2x PCI-6733 AO, 1 x PCI-6133 AI).

 

(1) Has anyone written drivers for the FPGA to enable DMA transfers equivalent to the NI-DAQmx drivers that I currently use?  Are there drop in replacements for the NI-DAQmx vi's so that I could get up and running fast?

 

(2) Is there example FPGA code that would allow me to:

        A. Perform buffered DO, AO, and AI sequence for approximately 1 second, using DMA transfers to increase memory depth.

        B. During the ~1second, the user decides to change the sequence of DO, AO, AI (I already have a nice/exensive GUI for this step.)

        C. The new sequence is written to a buffer and then handed over to hardware timing (probably start triggered off of line voltage) for step A.

 

The goal is to write the buffers fast (ms) so that there is very little deadtime caused by communication/initialization/writing buffers.  My understanding is that it is the programming of the FPGA which is slow, but once programmed, buffers can be written and passed quickly.  I just can't find good example code for this, but it seems pretty fundamental to me.

 

In the future, I would like to build in decision making and branching in real time, but to start, I just want to make sure I can do what I do with NI-DAQmx.

 

Any help would be very much appreciated.

 

 

 

 

      

 

 

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Greetings ColderAtom

 

There are a great many resources online that could prove useful to you when getting started with FPGA in LabVIEW. This one for example could be of great use, since it discusses DMA implementation.

 

http://www.ni.com/white-paper/4534/en/

 

http://www.ni.com/pdf/manuals/372596a.pdf

 

https://decibel.ni.com/content/docs/DOC-9893

 

http://www.ni.com/swf/presentation/us/labview/lvfpga/

 

Let us know if you require more assistance and we will be happy to help. Have a nice day.

Luis J.
Applications Engineer
National Instruments
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Hi,

 

There are also examples shipped with the LabVIEW FPGA software that could be useful, they use DMA to buffer data signals.

 

Also, it is the compile on the FPGA which takes some time, the speed of programming depends on the programmer. Smiley Happy

 

Darren.

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Thank you for the hints about checking out the examples.  I will take a look at them.

 

Actually, by "programming", I actually meant the step of communicating the compiled program to the FPGA and having it start executing. Do you happen to know if this is a ms-timescale step or a second-timescale step?  Is there a technical term for this tep that would allow me to find specifications for it?

 

Thanks again.

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